char *l;
symbol *tlbl;
- D(emitcode (";", "genNotFloat"));
+ D(emitcode ("; genNotFloat",""));
/* we will put 127 in the first byte of
the result */
symbol *tlbl;
sym_link *optype = operandType (IC_LEFT (ic));
- D(emitcode (";", "genNot"));
+ D(emitcode ("; genNot",""));
/* assign asmOps to operand & result */
aopOp (IC_LEFT (ic), ic, FALSE);
int size;
symbol *tlbl;
- D(emitcode (";", "genCpl"));
+ D(emitcode ("; genCpl",""));
/* assign asmOps to operand & result */
aopOp (IC_LEFT (ic), ic, FALSE);
int size, offset = 0;
char *l;
- D(emitcode (";", "genUminusFloat"));
+ D(emitcode ("; genUminusFloat",""));
/* for this we just need to flip the
first it then copy the rest in place */
sym_link *optype, *rtype;
- D(emitcode (";", "genUminus"));
+ D(emitcode ("; genUminus",""));
/* assign asmops */
aopOp (IC_LEFT (ic), ic, FALSE);
regs *r;
int size, offset = 0;
- D(emitcode (";", "genXpush"));
+ D(emitcode ("; genXpush",""));
aopOp (IC_LEFT (ic), ic, FALSE);
r = getFreePtr (ic, &aop, FALSE);
int size, offset = 0;
char *l;
- D(emitcode (";", "genIpush"));
+ D(emitcode ("; genIpush",""));
/* if this is not a parm push : ie. it is spill push
and spill push is always done on the local stack */
{
int size, offset;
- D(emitcode (";", "genIpop"));
+ D(emitcode ("; genIpop",""));
/* if the temp was not pushed then */
if (OP_SYMBOL (IC_LEFT (ic))->isspilt)
// bool restoreBank = FALSE;
bool swapBanks = FALSE;
- D(emitcode(";", "genCall"));
+ D(emitcode("; genCall",""));
dtype = operandType (IC_LEFT (ic));
/* if send set is not empty the assign */
// bool restoreBank=FALSE;
bool swapBanks = FALSE;
- D(emitcode(";", "genPCall"));
+ D(emitcode("; genPCall",""));
/* if caller saves & we have not saved then */
if (!ic->regsSaved)
{
int size, offset = 0, pushed = 0;
- D(emitcode (";", "genRet"));
+ D(emitcode ("; genRet",""));
/* if we have no return value then
just generate the "ret" */
if ((icount = (unsigned int) floatFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit)) > 4)
return FALSE;
- D(emitcode (";", "genPlusIncr"));
+ D(emitcode ("; genPlusIncr",""));
/* if increment 16 bits in register */
if (AOP_TYPE(IC_LEFT(ic)) == AOP_REG &&
static void
genPlusBits (iCode * ic)
{
- D(emitcode (";", "genPlusBits"));
+ D(emitcode ("; genPlusBits",""));
if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY)
{
/* special cases :- */
- D(emitcode (";", "genPlus"));
+ D(emitcode ("; genPlus",""));
aopOp (IC_LEFT (ic), ic, FALSE);
aopOp (IC_RIGHT (ic), ic, FALSE);
if ((icount = (unsigned int) floatFromVal (AOP (IC_RIGHT (ic))->aopu.aop_lit)) > 4)
return FALSE;
- D(emitcode (";", "genMinusDec"));
+ D(emitcode ("; genMinusDec",""));
/* if decrement 16 bits in register */
if (AOP_TYPE(IC_LEFT(ic)) == AOP_REG &&
{
symbol *lbl = newiTempLabel (NULL);
- D(emitcode (";", "genMinusBits"));
+ D(emitcode ("; genMinusBits",""));
if (AOP_TYPE (IC_RESULT (ic)) == AOP_CRY)
{
{
int size, offset = 0;
- D(emitcode (";", "genMinus"));
+ D(emitcode ("; genMinus",""));
aopOp (IC_LEFT (ic), ic, FALSE);
aopOp (IC_RIGHT (ic), ic, FALSE);
operand * right,
operand * result)
{
- D(emitcode (";", "genMultbits"));
+ D(emitcode ("; genMultbits",""));
emitcode ("mov", "c,%s", AOP (left)->aopu.aop_dir);
emitcode ("anl", "c,%s", AOP (right)->aopu.aop_dir);
symbol *lbl;
int size=AOP_SIZE(result);
- D(emitcode (";", "genMultOneByte"));
+ D(emitcode ("; genMultOneByte",""));
if (size<1 || size>2) {
// this should never happen
operand *right = IC_RIGHT (ic);
operand *result = IC_RESULT (ic);
- D(emitcode (";", "genMult"));
+ D(emitcode ("; genMult",""));
/* assign the amsops */
aopOp (left, ic, FALSE);
char *l;
- D(emitcode (";", "genDivbits"));
+ D(emitcode ("; genDivbits",""));
/* the result must be bit */
emitcode ("mov", "b,%s", aopGet (AOP (right), 0, FALSE, FALSE));
symbol *lbl;
int size, offset;
- D(emitcode (";", "genDivOneByte"));
+ D(emitcode ("; genDivOneByte",""));
size = AOP_SIZE (result) - 1;
offset = 1;
operand *right = IC_RIGHT (ic);
operand *result = IC_RESULT (ic);
- D(emitcode (";", "genDiv"));
+ D(emitcode ("; genDiv",""));
/* assign the amsops */
aopOp (left, ic, FALSE);
char *l;
- D(emitcode (";", "genModbits"));
+ D(emitcode ("; genModbits",""));
/* the result must be bit */
emitcode ("mov", "b,%s", aopGet (AOP (right), 0, FALSE, FALSE));
char *l;
symbol *lbl;
- D(emitcode (";", "genModOneByte"));
+ D(emitcode ("; genModOneByte",""));
/* signed or unsigned */
if (SPEC_USIGN (opetype))
operand *right = IC_RIGHT (ic);
operand *result = IC_RESULT (ic);
- D(emitcode (";", "genMod"));
+ D(emitcode ("; genMod",""));
/* assign the amsops */
aopOp (left, ic, FALSE);
symbol *tlbl = newiTempLabel (NULL);
char *inst;
- D(emitcode (";", "genIfxJump"));
+ D(emitcode ("; genIfxJump",""));
/* if true label then we jump if condition
supplied is true */
int size, offset = 0;
unsigned long lit = 0L;
- D(emitcode (";", "genCmp"));
+ D(emitcode ("; genCmp",""));
/* if left & right are bit variables */
if (AOP_TYPE (left) == AOP_CRY &&
sym_link *letype, *retype;
int sign;
- D(emitcode (";", "genCmpGt"));
+ D(emitcode ("; genCmpGt",""));
left = IC_LEFT (ic);
right = IC_RIGHT (ic);
sym_link *letype, *retype;
int sign;
- D(emitcode (";", "genCmpLt"));
+ D(emitcode ("; genCmpLt",""));
left = IC_LEFT (ic);
right = IC_RIGHT (ic);
{
operand *left, *right, *result;
- D(emitcode (";", "genCmpEq"));
+ D(emitcode ("; genCmpEq",""));
aopOp ((left = IC_LEFT (ic)), ic, FALSE);
aopOp ((right = IC_RIGHT (ic)), ic, FALSE);
operand *left, *right, *result;
symbol *tlbl;
- D(emitcode (";", "genAndOp"));
+ D(emitcode ("; genAndOp",""));
/* note here that && operations that are in an
if statement are taken away by backPatchLabels
operand *left, *right, *result;
symbol *tlbl;
- D(emitcode (";", "genOrOp"));
+ D(emitcode ("; genOrOp",""));
/* note here that || operations that are in an
if statement are taken away by backPatchLabels
int bytelit = 0;
char buffer[10];
- D(emitcode (";", "genAnd"));
+ D(emitcode ("; genAnd",""));
aopOp ((left = IC_LEFT (ic)), ic, FALSE);
aopOp ((right = IC_RIGHT (ic)), ic, FALSE);
int size, offset = 0;
unsigned long lit = 0L;
- D(emitcode (";", "genOr"));
+ D(emitcode ("; genOr",""));
aopOp ((left = IC_LEFT (ic)), ic, FALSE);
aopOp ((right = IC_RIGHT (ic)), ic, FALSE);
int size, offset = 0;
unsigned long lit = 0L;
- D(emitcode (";", "genXor"));
+ D(emitcode ("; genXor",""));
aopOp ((left = IC_LEFT (ic)), ic, FALSE);
aopOp ((right = IC_RIGHT (ic)), ic, FALSE);
{
char *buffer, *bp, *bp1;
- D(emitcode (";", "genInline"));
+ D(emitcode ("; genInline",""));
_G.inLine += (!options.asmpeep);
int size, offset = 0;
char *l;
- D(emitcode (";", "genRRC"));
+ D(emitcode ("; genRRC",""));
/* rotate right with carry */
left = IC_LEFT (ic);
int size, offset = 0;
char *l;
- D(emitcode (";", "genRLC"));
+ D(emitcode ("; genRLC",""));
/* rotate right with carry */
left = IC_LEFT (ic);
{
operand *left, *result;
- D(emitcode (";", "genGetHbit"));
+ D(emitcode ("; genGetHbit",""));
left = IC_LEFT (ic);
result = IC_RESULT (ic);
static void
genlshOne (operand * result, operand * left, int shCount)
{
- D(emitcode (";", "genlshOne"));
+ D(emitcode ("; genlshOne",""));
shiftL1Left2Result (left, LSB, result, LSB, shCount);
}
{
int size;
- D(emitcode (";", "genlshTwo"));
+ D(emitcode ("; genlshTwo",""));
size = getDataSize (result);
{
int size;
- D(emitcode (";", "genlshFour"));
+ D(emitcode ("; genlshFour",""));
size = AOP_SIZE (result);
int shCount = (int) floatFromVal (AOP (right)->aopu.aop_lit);
int size;
- D(emitcode (";", "genLeftShiftLiteral"));
+ D(emitcode ("; genLeftShiftLiteral",""));
freeAsmop (right, NULL, ic, TRUE);
char *l;
symbol *tlbl, *tlbl1;
- D(emitcode (";", "genLeftShift"));
+ D(emitcode ("; genLeftShift",""));
right = IC_RIGHT (ic);
left = IC_LEFT (ic);
genrshOne (operand * result, operand * left,
int shCount, int sign)
{
- D(emitcode (";", "genrshOne"));
+ D(emitcode ("; genrshOne",""));
shiftR1Left2Result (left, LSB, result, LSB, shCount, sign);
}
genrshTwo (operand * result, operand * left,
int shCount, int sign)
{
- D(emitcode (";", "genrshTwo"));
+ D(emitcode ("; genrshTwo",""));
/* if shCount >= 8 */
if (shCount >= 8)
genrshFour (operand * result, operand * left,
int shCount, int sign)
{
- D(emitcode (";", "genrshFour"));
+ D(emitcode ("; genrshFour",""));
/* if shifting more that 3 bytes */
if (shCount >= 24)
int shCount = (int) floatFromVal (AOP (right)->aopu.aop_lit);
int size;
- D(emitcode (";", "genRightShiftLiteral"));
+ D(emitcode ("; genRightShiftLiteral",""));
freeAsmop (right, NULL, ic, TRUE);
char *l;
symbol *tlbl, *tlbl1;
- D(emitcode (";", "genSignedRightShift"));
+ D(emitcode ("; genSignedRightShift",""));
/* we do it the hard way put the shift count in b
and loop thru preserving the sign */
char *l;
symbol *tlbl, *tlbl1;
- D(emitcode (";", "genRightShift"));
+ D(emitcode ("; genRightShift",""));
/* if signed then we do it the hard way preserve the
sign bit moving it inwards */
int offset = 0;
int rsize;
- D(emitcode (";", "genUnpackBits"));
+ D(emitcode ("; genUnpackBits",""));
etype = getSpec (operandType (result));
rsize = getSize (operandType (result));
char buffer[256];
int size, offset = 0;
- D(emitcode (";", "genDataPointerGet"));
+ D(emitcode ("; genDataPointerGet",""));
aopOp (result, ic, TRUE);
sym_link *ltype = operandType (left);
char buffer[80];
- D(emitcode (";", "genNearPointerGet"));
+ D(emitcode ("; genNearPointerGet",""));
rtype = operandType (result);
retype = getSpec (rtype);
char *rname;
sym_link *rtype, *retype;
- D(emitcode (";", "genPagedPointerGet"));
+ D(emitcode ("; genPagedPointerGet",""));
rtype = operandType (result);
retype = getSpec (rtype);
int size, offset;
sym_link *retype = getSpec (operandType (result));
- D(emitcode (";", "genFarPointerGet"));
+ D(emitcode ("; genFarPointerGet",""));
aopOp (left, ic, FALSE);
int size, offset;
sym_link *retype = getSpec (operandType (result));
- D(emitcode (";", "genCodePointerGet"));
+ D(emitcode ("; genCodePointerGet",""));
aopOp (left, ic, FALSE);
int size, offset;
sym_link *retype = getSpec (operandType (result));
- D(emitcode (";", "genGenPointerGet"));
+ D(emitcode ("; genGenPointerGet",""));
aopOp (left, ic, FALSE);
sym_link *type, *etype;
int p_type;
- D(emitcode (";", "genPointerGet"));
+ D(emitcode ("; genPointerGet",""));
left = IC_LEFT (ic);
result = IC_RESULT (ic);
int blen, bstr;
char *l;
- D(emitcode (";", "genPackBits"));
+ D(emitcode ("; genPackBits",""));
blen = SPEC_BLEN (etype);
bstr = SPEC_BSTR (etype);
int size, offset = 0;
char *l, buffer[256];
- D(emitcode (";", "genDataPointerSet"));
+ D(emitcode ("; genDataPointerSet",""));
aopOp (right, ic, FALSE);
sym_link *retype, *letype;
sym_link *ptype = operandType (result);
- D(emitcode (";", "genNearPointerSet"));
+ D(emitcode ("; genNearPointerSet",""));
retype = getSpec (operandType (right));
letype = getSpec (ptype);
char *rname, *l;
sym_link *retype, *letype;
- D(emitcode (";", "genPagedPointerSet"));
+ D(emitcode ("; genPagedPointerSet",""));
retype = getSpec (operandType (right));
letype = getSpec (operandType (result));
sym_link *retype = getSpec (operandType (right));
sym_link *letype = getSpec (operandType (result));
- D(emitcode (";", "genFarPointerSet"));
+ D(emitcode ("; genFarPointerSet",""));
aopOp (result, ic, FALSE);
sym_link *retype = getSpec (operandType (right));
sym_link *letype = getSpec (operandType (result));
- D(emitcode (";", "genGenPointerSet"));
+ D(emitcode ("; genGenPointerSet",""));
aopOp (result, ic, FALSE);
sym_link *type, *etype;
int p_type;
- D(emitcode (";", "genPointerSet"));
+ D(emitcode ("; genPointerSet",""));
right = IC_RIGHT (ic);
result = IC_RESULT (ic);
operand *cond = IC_COND (ic);
int isbit = 0;
- D(emitcode (";", "genIfx"));
+ D(emitcode ("; genIfx",""));
aopOp (cond, ic, FALSE);
symbol *sym = OP_SYMBOL (IC_LEFT (ic));
int size, offset;
- D(emitcode (";", "genAddrOf"));
+ D(emitcode ("; genAddrOf",""));
aopOp (IC_RESULT (ic), ic, FALSE);
int offset = 0;
char *l;
- D(emitcode (";", "genFarFarAssign"));
+ D(emitcode ("; genFarFarAssign",""));
/* first push the right side on to the stack */
while (size--)
int size, offset;
unsigned long lit = 0L;
- D(emitcode(";","genAssign"));
+ D(emitcode("; genAssign",""));
result = IC_RESULT (ic);
right = IC_RIGHT (ic);
symbol *jtab;
char *l;
- D(emitcode (";", "genJumpTab"));
+ D(emitcode ("; genJumpTab",""));
aopOp (IC_JTCOND (ic), ic, FALSE);
/* get the condition into accumulator */
operand *right = IC_RIGHT (ic);
int size, offset;
- D(emitcode(";", "genCast"));
+ D(emitcode("; genCast",""));
/* if they are equivalent then do nothing */
if (operandsEqu (IC_RESULT (ic), IC_RIGHT (ic)))
if (!ifx)
return 0;
- D(emitcode (";", "genDjnz"));
+ D(emitcode ("; genDjnz",""));
/* if the if condition has a false label
then we cannot save */
{
int size = getSize (operandType (IC_RESULT (ic)));
int offset = 0;
- D(emitcode (";", "genReceive"));
+ D(emitcode ("; genReceive",""));
if (ic->argreg == 1) { /* first parameter */
if (isOperandInFarSpace (IC_RESULT (ic)) &&
ic->level, ic->block);
_G.debugLine = 0;
}
- emitcode ("", ";\t%s:%d: %s", ic->filename, ic->lineno,
+ emitcode ("", "; %s:%d: %s", ic->filename, ic->lineno,
printCLine(ic->filename, ic->lineno));
cln = ic->lineno;
}
// pop %1
// push %1
//} by {
-// ; Peephole 1 removed pop %1 push %1 (not push pop)
+// ; Peephole 1 removed pop %1 push %1 (not push pop)
//}
//replace restart {
// mov %2,%3
// push %1
//} by {
-// ; Peephole 2 removed pop %1 push %1 (not push pop)
+// ; Peephole 2 removed pop %1 push %1 (not push pop)
// mov %2,%3
//}
xch a,%1
xch a,%1
} by {
- ; Peephole 2.a removed redundant xch xch
+ ; Peephole 2.a removed redundant xch xch
}
replace restart {
mov %1,#0x00
mov a,#0x00
} by {
- ; Peephole 3.a changed mov to clr
+ ; Peephole 3.a changed mov to clr
clr a
mov %1,a
}
mov %1,#0x00
clr a
} by {
- ; Peephole 3.b changed mov to clr
+ ; Peephole 3.b changed mov to clr
clr a
mov %1,a
}
mov %2,#0x00
mov a,%3
} by {
- ; Peephole 3.c changed mov to clr
+ ; Peephole 3.c changed mov to clr
clr a
mov %1,a
mov %2,a
mov a,%1
movx @dptr,a
} by {
- ; Peephole 100 removed redundant mov
+ ; Peephole 100 removed redundant mov
mov %1,a
mov dptr,#%2
movx @dptr,a
replace {
mov a,acc
} by {
- ; Peephole 100.a removed redundant mov
+ ; Peephole 100.a removed redundant mov
}
replace {
mov a,%1
movx @dptr,a
} by {
- ; Peephole 101 removed redundant mov
+ ; Peephole 101 removed redundant mov
mov a,%1
movx @dptr,a
inc dptr
mov sp,bp
pop bp
} by {
- ; Peephole 102 removed redundant mov
+ ; Peephole 102 removed redundant mov
mov dpl,%2
ljmp %3
%4:
mov sp,bp
pop bp
} by {
- ; Peephole 103 removed redundant mov
+ ; Peephole 103 removed redundant mov
mov dpl,%2
ljmp %3
%4:
add a,#0x01
mov r%1,a
} by {
- ; Peephole 104 optimized increment (acc not set to r%1, flags undefined)
+ ; Peephole 104 optimized increment (acc not set to r%1, flags undefined)
mov r%1,bp
inc r%1
}
mov %1,a
mov a,%1
} by {
- ; Peephole 105 removed redundant mov
+ ; Peephole 105 removed redundant mov
mov %1,a
}
clr c
mov a,%1
} by {
- ; Peephole 106 removed redundant mov
+ ; Peephole 106 removed redundant mov
mov %1,a
clr c
}
ljmp %1
%1:
} by {
- ; Peephole 107 removed redundant ljmp
+ ; Peephole 107 removed redundant ljmp
%1:
}
ljmp %5
%1:
} by {
- ; Peephole 108 removed ljmp by inverse jump logic
+ ; Peephole 108 removed ljmp by inverse jump logic
jnc %5
%1:
} if labelInRange
ljmp %5
%1:
} by {
- ; Peephole 109 removed ljmp by inverse jump logic
+ ; Peephole 109 removed ljmp by inverse jump logic
jnz %5
%1:
} if labelInRange
ljmp %5
%1:
} by {
- ; Peephole 110 removed ljmp by inverse jump logic
+ ; Peephole 110 removed ljmp by inverse jump logic
jz %5
%1:
} if labelInRange
ljmp %5
%2:
} by {
- ; Peephole 111 removed ljmp by inverse jump logic
+ ; Peephole 111 removed ljmp by inverse jump logic
jnb %1,%5
%2:
} if labelInRange
ljmp %5
%2:
} by {
- ; Peephole 112 removed ljmp by inverse jump logic
+ ; Peephole 112 removed ljmp by inverse jump logic
jb %1,%5
%2:
} if labelInRange
ljmp %5
%1:
} by {
- ; Peephole 132 changed ljmp to sjmp
+ ; Peephole 132 changed ljmp to sjmp
sjmp %5
%1:
} if labelInRange
rrc a
mov %4,c
} by {
- ; Peephole 113 optimized misc sequence
+ ; Peephole 113 optimized misc sequence
clr %4
cjne %1,%2,%3
setb %4
rrc a
mov %4,c
} by {
- ; Peephole 114 optimized misc sequence
+ ; Peephole 114 optimized misc sequence
clr %4
cjne %1,%2,%3
cjne %10,%11,%3
%3:
jnz %4
} by {
- ; Peephole 115 jump optimization
+ ; Peephole 115 jump optimization
cjne %1,%2,%3
sjmp %4
%3:
%3:
jnz %4
} by {
- ; Peephole 116 jump optimization
+ ; Peephole 116 jump optimization
cjne %1,%2,%3
cjne %9,%10,%3
sjmp %4
%3:
jnz %4
} by {
- ; Peephole 117 jump optimization
+ ; Peephole 117 jump optimization
cjne %1,%2,%3
cjne %9,%10,%3
cjne %11,%12,%3
%3:
jnz %4
} by {
- ; Peephole 118 jump optimization
+ ; Peephole 118 jump optimization
cjne %1,%2,%3
cjne %9,%10,%3
cjne %11,%12,%3
%3:
jnz %4
} by {
- ; Peephole 119 jump optimization
+ ; Peephole 119 jump optimization
cjne %1,%2,%4
%3:
} if labelRefCount %3 1
%3:
jnz %4
} by {
- ; Peephole 120 jump optimization
+ ; Peephole 120 jump optimization
cjne %1,%2,%4
cjne %10,%11,%4
%3:
%3:
jnz %4
} by {
- ; Peephole 121 jump optimization
+ ; Peephole 121 jump optimization
cjne %1,%2,%4
cjne %10,%11,%4
cjne %12,%13,%4
%3:
jnz %4
} by {
- ; Peephole 122 jump optimization
+ ; Peephole 122 jump optimization
cjne %1,%2,%4
cjne %10,%11,%4
cjne %12,%13,%4
%3:
jz %4
} by {
- ; Peephole 123 jump optimization
+ ; Peephole 123 jump optimization
cjne %1,%2,%3
smp %4
%3:
%3:
jz %4
} by {
- ; Peephole 124 jump optimization
+ ; Peephole 124 jump optimization
cjne %1,%2,%3
cjne %10,%11,%3
sjmp %4
%3:
jz %4
} by {
- ; Peephole 125 jump optimization
+ ; Peephole 125 jump optimization
cjne %1,%2,%3
cjne %10,%11,%3
cjne %12,%13,%3
%3:
jz %4
} by {
- ; Peephole 126 jump optimization
+ ; Peephole 126 jump optimization
cjne %1,%2,%3
cjne %10,%11,%3
cjne %12,%13,%3
pop psw
ret
} by {
- ; Peephole 127 removed misc sequence
+ ; Peephole 127 removed misc sequence
ret
} if labelRefCount %3 0
rlc a
jz %1
} by {
- ; Peephole 128 jump optimization
+ ; Peephole 128 jump optimization
jnc %1
}
rlc a
jnz %1
} by {
- ; Peephole 129 jump optimization
+ ; Peephole 129 jump optimization
jc %1
}
replace {
mov r%1,@r%2
} by {
- ; Peephole 130 changed target address mode r%1 to ar%1
+ ; Peephole 130 changed target address mode r%1 to ar%1
mov ar%1,@r%2
}
mov %2,a
mov %1,%2
} by {
- ; Peephole 131 optimized decrement (not caring for c)
+ ; Peephole 131 optimized decrement (not caring for c)
dec %1
mov %2,%1
}
mov r%4,%2
mov @r%4,ar%3
} by {
- ; Peephole 133 removed redundant moves
+ ; Peephole 133 removed redundant moves
mov r%1,%2
inc @r%1
mov ar%3,@r%1
mov r%4,%2
mov @r%4,ar%3
} by {
- ; Peephole 134 removed redundant moves
+ ; Peephole 134 removed redundant moves
mov r%1,%2
dec @r%1
mov ar%3,@r%1
mov a,r%2
orl a,r%1
} by {
- ; Peephole 135 removed redundant mov
+ ; Peephole 135 removed redundant mov
mov r%1,a
orl a,r%2
}
mov dph,%3
mov a,%1
} by {
- ; Peephole 136 removed redundant moves
+ ; Peephole 136 removed redundant moves
mov %1,a
mov dpl,%2
mov dph,%3
// mov a,b
// jz %5
//} by {
-// ; Peephole 137 optimized misc jump sequence
+// ; Peephole 137 optimized misc jump sequence
// mov a,%1
// cjne %2,%3,%5
//%4:
// mov a,b
// jnz %5
//} by {
-// ; Peephole 138 optimized misc jump sequence
+// ; Peephole 138 optimized misc jump sequence
// mov a,%1
// cjne %2,%3,%4
// sjmp %5
anl ar%1,%2
mov a,r%1
} by {
- ; Peephole 139 removed redundant mov
+ ; Peephole 139 removed redundant mov
anl a,%2
mov r%1,a
}
orl ar%1,%2
mov a,r%1
} by {
- ; Peephole 140 removed redundant mov
+ ; Peephole 140 removed redundant mov
orl a,%2
mov r%1,a }
xrl ar%1,%2
mov a,r%1
} by {
- ; Peephole 141 removed redundant mov
+ ; Peephole 141 removed redundant mov
xrl a,%2
mov r%1,a
}
mov r%2,ar%1
mov ar%1,@r%2
} by {
- ; Peephole 142 removed redundant moves
+ ; Peephole 142 removed redundant moves
mov r%2,a
mov ar%1,@r%2
}
rlc a
mov acc.0,c
} by {
- ; Peephole 143 converted rlc to rl
+ ; Peephole 143 converted rlc to rl
rl a
}
rrc a
mov acc.7,c
} by {
- ; Peephole 144 converted rrc to rc
+ ; Peephole 144 converted rrc to rc
rr a
}
clr c
addc a,%1
} by {
- ; Peephole 145 changed to add without carry
+ ; Peephole 145 changed to add without carry
add a,%1
}
mov a,%1
addc a,%2
} by {
- ; Peephole 146 changed to add without carry
+ ; Peephole 146 changed to add without carry
mov a,%1
add a,%2
}
replace {
orl r%1,a
} by {
- ; Peephole 147 changed target address mode r%1 to ar%1
+ ; Peephole 147 changed target address mode r%1 to ar%1
orl ar%1,a
}
replace {
anl r%1,a
} by {
- ; Peephole 148 changed target address mode r%1 to ar%1
+ ; Peephole 148 changed target address mode r%1 to ar%1
anl ar%1,a
}
replace {
xrl r%1,a
} by {
- ; Peephole 149 changed target address mode r%1 to ar%1
+ ; Peephole 149 changed target address mode r%1 to ar%1
xrl ar%1,a
}
%9:
ret
} by {
- ; Peephole 150 removed misc moves via dpl before return
+ ; Peephole 150 removed misc moves via dpl before return
%9:
ret
}
%9:
ret
} by {
- ; Peephole 151 removed misc moves via dph, dpl before return
+ ; Peephole 151 removed misc moves via dph, dpl before return
%9:
ret
}
%9:
ret
} by {
- ; Peephole 152 removed misc moves via dph, dpl before return
+ ; Peephole 152 removed misc moves via dph, dpl before return
%9:
ret
}
%9:
ret
} by {
- ; Peephole 153 removed misc moves via dph, dpl, b before return
+ ; Peephole 153 removed misc moves via dph, dpl, b before return
%9:
ret
}
%9:
ret
} by {
- ; Peephole 154 removed misc moves via dph, dpl, b before return
+ ; Peephole 154 removed misc moves via dph, dpl, b before return
%9:
ret
}
%9:
ret
} by {
- ; Peephole 155 removed misc moves via dph, dpl, b before return
+ ; Peephole 155 removed misc moves via dph, dpl, b before return
%9:
ret
}
%9:
ret
} by {
- ; Peephole 156 removed misc moves via dph, dpl, b, a before return
+ ; Peephole 156 removed misc moves via dph, dpl, b, a before return
%9:
ret
}
%9:
ret
} by {
- ; Peephole 157 removed misc moves via dph, dpl, b, a before return
+ ; Peephole 157 removed misc moves via dph, dpl, b, a before return
%9:
ret
}
mov dpl,%1
%9:
ret } by {
- ; Peephole 158 removed misc moves via dph, dpl, b, a before return
+ ; Peephole 158 removed misc moves via dph, dpl, b, a before return
%9:
ret }
mov %1,#%2
xrl %1,#0x80
} by {
- ; Peephole 159 avoided xrl during execution
+ ; Peephole 159 avoided xrl during execution
mov %1,#(%2 ^ 0x80)
}
sjmp %2
%1:
} by {
- ; Peephole 160 removed sjmp by inverse jump logic
+ ; Peephole 160 removed sjmp by inverse jump logic
jc %2
%1:}
sjmp %2
%1:
} by {
- ; Peephole 161 removed sjmp by inverse jump logic
+ ; Peephole 161 removed sjmp by inverse jump logic
jnc %2
%1:}
sjmp %2
%1:
} by {
- ; Peephole 162 removed sjmp by inverse jump logic
+ ; Peephole 162 removed sjmp by inverse jump logic
jz %2
%1:}
sjmp %2
%1:
} by {
- ; Peephole 163 removed sjmp by inverse jump logic
+ ; Peephole 163 removed sjmp by inverse jump logic
jnz %2
%1:}
sjmp %2
%1:
} by {
- ; Peephole 164 removed sjmp by inverse jump logic
+ ; Peephole 164 removed sjmp by inverse jump logic
jb %3,%2
%1:
}
sjmp %2
%1:
} by {
- ; Peephole 165 removed sjmp by inverse jump logic
+ ; Peephole 165 removed sjmp by inverse jump logic
jnb %3,%2
%1:
}
mov %3,%1
mov %2,%1
} by {
- ; Peephole 166 removed redundant mov
+ ; Peephole 166 removed redundant mov
mov %1,%2
mov %3,%1 }
cpl c
mov %1,c
} by {
- ; Peephole 167 removed redundant bit moves (c not set to %1)
+ ; Peephole 167 removed redundant bit moves (c not set to %1)
cpl %1 }
replace {
jnb %1,%2
sjmp %3
%2:} by {
- ; Peephole 168 jump optimization
+ ; Peephole 168 jump optimization
jb %1,%3
%2:}
jb %1,%2
sjmp %3
%2:} by {
- ; Peephole 169 jump optimization
+ ; Peephole 169 jump optimization
jnb %1,%3
%2:}
%3:
jz %4
} by {
- ; Peephole 170 jump optimization
+ ; Peephole 170 jump optimization
cjne %1,%2,%4
%3:
} if labelRefCount %3 1
%3:
jz %4
} by {
- ; Peephole 171 jump optimization
+ ; Peephole 171 jump optimization
cjne %1,%2,%4
cjne %9,%10,%4
%3:
%3:
jz %4
} by {
- ; Peephole 172 jump optimization
+ ; Peephole 172 jump optimization
cjne %1,%2,%4
cjne %9,%10,%4
cjne %11,%12,%4
%3:
jz %4
} by {
- ; Peephole 173 jump optimization
+ ; Peephole 173 jump optimization
cjne %1,%2,%4
cjne %9,%10,%4
cjne %11,%12,%4
subb a,#0x01
mov %2,a
} by {
- ; Peephole 174 optimized decrement (acc not set to %2, flags undefined)
+ ; Peephole 174 optimized decrement (acc not set to %2, flags undefined)
mov r%1,%2
dec %2
}
add a,#0x01
mov %2,a
} by {
- ; Peephole 175 optimized increment (acc not set to %2, flags undefined)
+ ; Peephole 175 optimized increment (acc not set to %2, flags undefined)
mov r%1,%2
inc %2
}
inc %1
mov @r%2,%1
} by {
- ; Peephole 176 optimized increment, removed redundant mov
+ ; Peephole 176 optimized increment, removed redundant mov
inc @r%2
mov %1,@r%2
}
// mov %1,%2
// mov %2,%1
//} by {
-// ; Peephole 177 removed redundant mov
+// ; Peephole 177 removed redundant mov
// mov %1,%2
//}
mov b,a
mov a,%2
} by {
- ; Peephole 178 removed redundant mov
+ ; Peephole 178 removed redundant mov
mov b,%1
mov a,%2
}
mov b,#0x00
mov a,#0x00
} by {
- ; Peephole 179 changed mov to clr
+ ; Peephole 179 changed mov to clr
clr a
mov b,a
}
replace {
mov a,#0x00
} by {
- ; Peephole 180 changed mov to clr
+ ; Peephole 180 changed mov to clr
clr a
}
mov dpl,#0x00
mov dph,#0x00
} by {
- ; Peephole 181 used 16 bit load of dptr
+ ; Peephole 181 used 16 bit load of dptr
mov dptr,#0x0000
}
mov dpl,#%1
mov dph,#(%1 >> 8)
} by {
- ; Peephole 182a use 16 bit load of DPTR
+ ; Peephole 182a use 16 bit load of DPTR
mov dptr,#%1
}
mov dpl,#%1
mov dph,#%2
} by {
- ; Peephole 182 used 16 bit load of dptr
+ ; Peephole 182 used 16 bit load of dptr
mov dptr,#(((%2)<<8) + %1)
}
anl %1,#%2
anl %1,#%3
} by {
- ; Peephole 183 avoided anl during execution
+ ; Peephole 183 avoided anl during execution
anl %1,#(%2 & %3)
}
cpl a
mov %1,a
} by {
- ; Peephole 184 removed redundant mov
+ ; Peephole 184 removed redundant mov
cpl a
mov %1,a
}
mov %1,a
inc %1
} by {
- ; Peephole 185 changed order of increment (acc incremented also!)
+ ; Peephole 185 changed order of increment (acc incremented also!)
inc a
mov %1,a
}
inc dptr
clr a
} by {
- ; Peephole 186.a optimized movc sequence
+ ; Peephole 186.a optimized movc sequence
mov dptr,#%1
mov b,acc
movc a,@a+dptr
inc dptr
clr a
} by {
- ; Peephole 186.b optimized movc sequence
+ ; Peephole 186.b optimized movc sequence
mov dptr,#%1
mov b,acc
movc a,@a+dptr
inc dptr
clr a
} by {
- ; Peephole 186.c optimized movc sequence
+ ; Peephole 186.c optimized movc sequence
mov dptr,#%1
mov b,acc
movc a,@a+dptr
clr a
movc a,@a+dptr
} by {
- ; Peephole 186 optimized movc sequence
+ ; Peephole 186 optimized movc sequence
mov dptr,#%1
movc a,@a+dptr
}
anl ar%1,#%3
mov a,r%1
} by {
- ; Peephole 187 used a instead of ar%1 for anl
+ ; Peephole 187 used a instead of ar%1 for anl
mov a,%2
anl a,#%3
mov r%1,a
movc a,@a+dptr
mov %1,a
} by {
- ; Peephole 188 removed redundant mov
+ ; Peephole 188 removed redundant mov
mov dptr,%2
movc a,@a+dptr
mov %1,a
mov a,#0x0f
anl a,%1
} by {
- ; Peephole 189 removed redundant mov and anl
+ ; Peephole 189 removed redundant mov and anl
anl a,#0x0f
mov %1,a
}
lcall __gptrput
mov a,%1
} by {
- ; Peephole 190 removed redundant mov
+ ; Peephole 190 removed redundant mov
mov a,%1
lcall __gptrput
}
mov b,%4
mov a,%1
} by {
- ; Peephole 191 removed redundant mov
+ ; Peephole 191 removed redundant mov
mov %1,a
mov dpl,%2
mov dph,%3
mov r%1,a
mov @r%2,ar%1
} by {
- ; Peephole 192 used a instead of ar%1 as source
+ ; Peephole 192 used a instead of ar%1 as source
mov r%1,a
mov @r%2,a
}
%3:
sjmp %8
} by {
- ; Peephole 193.a optimized misc jump sequence
+ ; Peephole 193.a optimized misc jump sequence
jnz %8
mov a,%4
jnz %8
%3:
sjmp %8
} by {
- ; Peephole 193 optimized misc jump sequence
+ ; Peephole 193 optimized misc jump sequence
cjne %1,%2,%8
mov a,%4
cjne %5,%6,%8
%3:
sjmp %8
} by {
- ; Peephole 193.a optimized misc jump sequence
+ ; Peephole 193.a optimized misc jump sequence
cjne @%1,%2,%8
inc %1
cjne @%1,%6,%8
%3:
sjmp %8
} by {
- ; Peephole 194 optimized misc jump sequence
+ ; Peephole 194 optimized misc jump sequence
cjne %1,%2,%8
cjne %5,%6,%8
cjne %10,%11,%8
%3:
sjmp %8
} by {
- ; Peephole 195.a optimized misc jump sequence
+ ; Peephole 195.a optimized misc jump sequence
jnz %8
mov a,%4
jnz %8
%3:
sjmp %8
} by {
- ; Peephole 195 optimized misc jump sequence
+ ; Peephole 195 optimized misc jump sequence
cjne %1,%2,%8
mov a,%4
cjne %5,%6,%8
%3:
sjmp %8
} by {
- ; Peephole 195.a optimized misc jump sequence
+ ; Peephole 195.a optimized misc jump sequence
cjne @%1,%2,%8
inc %1
cjne @%1,%6,%8
%3:
sjmp %8
} by {
- ; Peephole 196 optimized misc jump sequence
+ ; Peephole 196 optimized misc jump sequence
cjne %1,%2,%8
cjne %5,%6,%8
cjne %10,%11,%8
%3:
sjmp %8
} by {
- ; Peephole 197.a optimized misc jump sequence
+ ; Peephole 197.a optimized misc jump sequence
jnz %8
mov a,%4
cjne %5,%6,%8
%3:
sjmp %8
} by {
- ; Peephole 197 optimized misc jump sequence
+ ; Peephole 197 optimized misc jump sequence
cjne %1,%2,%8
mov a,%4
cjne %5,%6,%8
%3:
sjmp %8
} by {
- ; Peephole 197.a optimized misc jump sequence
+ ; Peephole 197.a optimized misc jump sequence
cjne @%1,%2,%8
inc %1
cjne @%1,%6,%8
%3:
sjmp %8
} by {
- ; Peephole 198 optimized misc jump sequence
+ ; Peephole 198 optimized misc jump sequence
cjne %1,%2,%8
cjne %5,%6,%8
sjmp %7
%3:
sjmp %5
} by {
- ; Peephole 199 optimized misc jump sequence
+ ; Peephole 199 optimized misc jump sequence
cjne %1,%2,%5
sjmp %4
;%3:
sjmp %1
%1:
} by {
- ; Peephole 200 removed redundant sjmp
+ ; Peephole 200 removed redundant sjmp
%1:
}
%2:
%1:
} by {
- ; Peephole 201 removed redundant sjmp
+ ; Peephole 201 removed redundant sjmp
%2:
%1:
}
mov dptr,%1
pop acc
} by {
- ; Peephole 202 removed redundant push pop
+ ; Peephole 202 removed redundant push pop
mov dptr,%1
}
lcall %2
mov r%1,_spx
} by {
- ; Peephole 203 removed mov r%1,_spx
+ ; Peephole 203 removed mov r%1,_spx
lcall %2
}
add a,acc
mov %1,a
} by {
- ; Peephole 204 removed redundant mov
+ ; Peephole 204 removed redundant mov
add a,acc
mov %1,a
}
sjmp %4
%3:
} by {
- ; Peephole 205 optimized misc jump sequence
+ ; Peephole 205 optimized misc jump sequence
djnz %1,%4
%2:
%3:
replace {
mov %1,%1
} by {
- ; Peephole 206 removed redundant mov %1,%1
+ ; Peephole 206 removed redundant mov %1,%1
}
replace {
add a,#0x00
mov %1,a
} by {
- ; Peephole 207 removed zero add (acc not set to %1, flags undefined)
+ ; Peephole 207 removed zero add (acc not set to %1, flags undefined)
mov %1,_bp
}
mov r%1,_bp
pop acc
} by {
- ; Peephole 208 removed redundant push pop
+ ; Peephole 208 removed redundant push pop
mov r%1,_bp
}
inc a
mov %1,a
} by {
- ; Peephole 209 optimized increment (acc not set to %1, flags undefined)
+ ; Peephole 209 optimized increment (acc not set to %1, flags undefined)
mov %1,_bp
inc %1
}
replace {
mov dptr,#((((%1 >> 8)) <<8) + %1)
} by {
- ; Peephole 210 simplified expression
+ ; Peephole 210 simplified expression
mov dptr,#%1
}
push %1
pop %1
} by {
- ; Peephole 211 removed redundant push %1 pop %1
+ ; Peephole 211 removed redundant push %1 pop %1
}
replace {
add a,#0x01
mov r%1,a
} by {
- ; Peephole 212 reduced add sequence to inc
+ ; Peephole 212 reduced add sequence to inc
mov r%1,_bp
inc r%1
}
mov a,%2
add a,%1
} by {
- ; Peephole 214 reduced some extra movs
+ ; Peephole 214 reduced some extra movs
mov %1,a
add a,%2
} if operandsNotSame
add a,%2
mov %1,a
} by {
- ; Peephole 215 removed some movs
+ ; Peephole 215 removed some movs
add a,%2
mov %1,a
} if operandsNotSame
dec r%1
mov @r%1,a
} by {
- ; Peephole 216 simplified clear (2bytes)
+ ; Peephole 216 simplified clear (2bytes)
mov r%1,%2
clr a
mov @r%1,a
dec r%1
mov @r%1,a
} by {
- ; Peephole 217 simplified clear (3bytes)
+ ; Peephole 217 simplified clear (3bytes)
mov r%1,%2
clr a
mov @r%1,a
dec r%1
mov @r%1,a
} by {
- ; Peephole 218 simplified clear (4bytes)
+ ; Peephole 218 simplified clear (4bytes)
mov r%1,%2
clr a
mov @r%1,a
clr a
movx @dptr,a
} by {
- ; Peephole 219 removed redundant clear
+ ; Peephole 219 removed redundant clear
clr a
movx @dptr,a
mov dptr,%1
clr a
movx @dptr,a
} by {
- ; Peephole 219a removed redundant clear
+ ; Peephole 219a removed redundant clear
clr a
movx @dptr,a
mov dptr,%1
mov dps, #0x00
mov dps, #0x01
} by {
- ; Peephole 220a removed bogus DPS set
+ ; Peephole 220a removed bogus DPS set
mov dps, #0x01
}
mov dps, #0x01
mov dps, #0x00
} by {
- ; Peephole 220b removed bogus DPS set
+ ; Peephole 220b removed bogus DPS set
mov dps, #0x00
}
replace {
mov %1 + %2,(%2 + %1)
} by {
- ; Peephole 221a remove redundant move
+ ; Peephole 221a remove redundant move
}
replace {
mov (%1 + %2 + %3),((%2 + %1) + %3)
} by {
- ; Peephole 221b remove redundant move
+ ; Peephole 221b remove redundant move
}
replace {
mov dpl,%1
mov dph,%2
} by {
- ; Peephole 223 removed redundant dph/dpl moves
+ ; Peephole 223 removed redundant dph/dpl moves
mov %1,dpl
mov %2,dph
}
mov dpl,%1
mov dph,(%1 + 1)
} by {
- ; Peephole 224 removed redundant dph/dpl moves
+ ; Peephole 224 removed redundant dph/dpl moves
mov %1,dpl
mov (%1 + 1),dph
}
mov b,%4
mov a,%1
} by {
- ; Peephole 225 removed redundant move to acc
+ ; Peephole 225 removed redundant move to acc
mov a,%1
movx @dptr,a
mov dpl,%2
inc dptr
clr a
} by {
- ; Peephole 226 removed unnecessary clr
+ ; Peephole 226 removed unnecessary clr
clr a
movx @dptr,a
inc dptr
lcall __decdptr
movx @dptr,a
} by {
- ; Peephole 227 replaced inefficient 32 bit clear
+ ; Peephole 227 replaced inefficient 32 bit clear
mov dptr,#%1
clr a
movx @dptr,a
mov a,#%2
movx @dptr,a
} by {
- ; Peephole 228 replaced inefficient 32 constant
+ ; Peephole 228 replaced inefficient 32 constant
mov dptr,#%1
mov a, #%2
movx @dptr,a
lcall __decdptr
movx @dptr,a
} by {
- ; Peephole 229 replaced inefficient 16 bit clear
+ ; Peephole 229 replaced inefficient 16 bit clear
mov dptr,#%1
clr a
movx @dptr,a
mov a,#%2
movx @dptr,a
} by {
- ; Peephole 230 replaced inefficient 16 constant
+ ; Peephole 230 replaced inefficient 16 constant
mov dptr,#%1
mov a,#%2
movx @dptr,a
mov dptr,#%1
mov dptr,#%2
} by {
- ; Peephole 231 removed redundant mov to dptr
+ ; Peephole 231 removed redundant mov to dptr
mov dptr,#%2
}
replace {
movx a,@dptr
} by {
- ; Peephole 232 using movc to read xdata (--xram-movc)
+ ; Peephole 232 using movc to read xdata (--xram-movc)
clr a
movc a,@a+dptr
} if xramMovcOption
replace {
lcall _gptrget
} by {
- ; Peephole 233 using _gptrgetc instead of _gptrget (--xram-movc)
+ ; Peephole 233 using _gptrgetc instead of _gptrget (--xram-movc)
lcall _gptrgetc
} if xramMovcOption
%2:
ret
} by {
- ; Peephole 234 loading dpl directly from a(ccumulator)
+ ; Peephole 234 loading dpl directly from a(ccumulator)
mov dpl,a
%2:
ret
%3:
ret
} by {
- ; Peephole 235 loading dph directly from a(ccumulator)
+ ; Peephole 235 loading dph directly from a(ccumulator)
mov dpl,r%2
mov dph,a
%3:
replace {
add a,ar%1
} by {
- ; Peephole 236a
+ ; Peephole 236a
add a,r%1
}
replace {
addc a,ar%1
} by {
- ; Peephole 236b
+ ; Peephole 236b
addc a,r%1
}
replace {
anl a,ar%1
} by {
- ; Peephole 236c
+ ; Peephole 236c
anl a,r%1
}
replace {
dec ar%1
} by {
- ; Peephole 236d
+ ; Peephole 236d
dec r%1
}
replace {
djnz ar%1,%2
} by {
- ; Peephole 236e
+ ; Peephole 236e
djnz r%1,%2
}
replace {
inc ar%1
} by {
- ; Peephole 236f
+ ; Peephole 236f
inc r%1
}
replace {
mov a,ar%1
} by {
- ; Peephole 236g
+ ; Peephole 236g
mov a,r%1
}
replace {
mov ar%1,#%2
} by {
- ; Peephole 236h
+ ; Peephole 236h
mov r%1,#%2
}
replace {
mov ar%1,a
} by {
- ; Peephole 236i
+ ; Peephole 236i
mov r%1,a
}
replace {
mov ar%1,ar%2
} by {
- ; Peephole 236j
+ ; Peephole 236j
mov r%1,ar%2
}
replace {
orl a,ar%1
} by {
- ; Peephole 236k
+ ; Peephole 236k
orl a,r%1
}
replace {
subb a,ar%1
} by {
- ; Peephole 236l
+ ; Peephole 236l
subb a,r%1
}
replace {
xch a,ar%1
} by {
- ; Peephole 236m
+ ; Peephole 236m
xch a,r%1
}
replace {
xrl a,ar%1
} by {
- ; Peephole 236n
+ ; Peephole 236n
xrl a,r%1
}
%1:
ret
} by {
- ; Peephole 237a removed sjmp to ret
+ ; Peephole 237a removed sjmp to ret
ret
%2:
mov %3,%4
%1:
ret
} by {
- ; Peephole 237b removed sjmp to ret
+ ; Peephole 237b removed sjmp to ret
ret
%2:
mov %3,%4