fprintf (file, "}{ sir@ %s", sym->usl.spillLoc->rname);
}
fprintf (file, "}");
-
- /* if assigned to registers */
- if (sym->nRegs)
- {
- if (sym->isspilt)
- {
- if (!sym->remat)
- if (sym->usl.spillLoc)
- fprintf (file, "[%s]", (sym->usl.spillLoc->rname[0] ?
- sym->usl.spillLoc->rname :
- sym->usl.spillLoc->name));
- else
- fprintf (file, "[err]");
- else
- fprintf (file, "[remat]");
- }
- else
- {
- int i;
- fprintf (file, "[");
- for (i = 0; i < sym->nRegs; i++)
- fprintf (file, "%s ", port->getRegName (sym->regs[i]));
- fprintf (file, "]");
- }
- }
fprintf (file, "\n");
}
void
rlivePoint (eBBlock ** ebbs, int count)
{
- int i;
-
- /* for all blocks do */
- for (i = 0; i < count; i++)
- {
- iCode *ic;
-
- /* for all instruction in the block do */
- for (ic = ebbs[i]->sch; ic; ic = ic->next)
- {
- symbol *lrange;
- int k;
-
- ic->rlive = newBitVect (operandKey);
- /* for all symbols in the liverange table */
- for (lrange = hTabFirstItem (liveRanges, &k); lrange;
- lrange = hTabNextItem (liveRanges, &k))
- {
-
- /* if it is live then add the lrange to ic->rlive */
- if (lrange->liveFrom <= ic->seq &&
- lrange->liveTo >= ic->seq)
- {
- lrange->isLiveFcall |= (ic->op == CALL || ic->op == PCALL || ic->op == SEND);
- ic->rlive = bitVectSetBit (ic->rlive, lrange->key);
+ int i;
+
+ /* for all blocks do */
+ for (i = 0; i < count; i++) {
+ iCode *ic;
+
+ /* for all instruction in the block do */
+ for (ic = ebbs[i]->sch; ic; ic = ic->next) {
+ symbol *lrange;
+ int k;
+
+ ic->rlive = newBitVect (operandKey);
+ /* for all symbols in the liverange table */
+ for (lrange = hTabFirstItem (liveRanges, &k); lrange;
+ lrange = hTabNextItem (liveRanges, &k)) {
+
+ /* if it is live then add the lrange to ic->rlive */
+ if (lrange->liveFrom <= ic->seq &&
+ lrange->liveTo >= ic->seq) {
+ lrange->isLiveFcall |= (ic->op == CALL || ic->op == PCALL || ic->op == SEND);
+ ic->rlive = bitVectSetBit (ic->rlive, lrange->key);
+ }
+ }
+ /* overlapping live ranges should be eliminated */
+ if (ASSIGN_ITEMP_TO_ITEMP (ic)) {
+
+ if (SPIL_LOC(IC_RIGHT(ic)) == SPIL_LOC(IC_RESULT(ic)) && /* left & right share the same spil location */
+ OP_SYMBOL(IC_RESULT(ic))->isreqv && /* left of assign is a register requivalent */
+ !OP_SYMBOL(IC_RIGHT(ic))->isreqv && /* right side is not */
+ OP_SYMBOL(IC_RIGHT(ic))->liveTo > ic->key && /* right side live beyond this point */
+ bitVectnBitsOn(OP_DEFS(IC_RESULT(ic))) > 1 ) { /* left has multiple definitions */
+ SPIL_LOC(IC_RIGHT(ic)) = NULL; /* then cannot share */
+ }
+ }
}
- }
}
- }
}
int size, offset;
aopOp (IC_RESULT (ic), ic, FALSE);
-
+ assert(AOP_SIZE(IC_RESULT(ic)) >= 2);
/* if the operand is on the stack then we
need to get the stack offset of this
variable */
if (sym->onStack) {
/* if it has an offset then we need to compute it */
if (sym->stack) {
- emitcode ("mov", "a,_bp");
- emitcode ("add", "a,#0x%02x",
+#if 0
+ if (AOP_ISHIGHREG(AOP(
((char) sym->stack & 0xff));
+#endif
aopPut (AOP (IC_RESULT (ic)), "a", 0);
}
else {
_G.dataExtend = 0;
}
- if (options.dump_rassgn)
+ if (options.dump_rassgn) {
dumpEbbsToFileExt (DUMP_RASSGN, ebbs, count);
+ dumpLiveRanges (DUMP_LRANGE, liveRanges);
+ }
/* after that create the register mask
for each of the instruction */