Merged r5203:5204 from developer branch jcorgan/atr. Fixed ATR delay enable and reduc...

git-svn-id: http://gnuradio.org/svn/gnuradio/trunk@5228 221aa14e-8319-0410-a670-987f0aec2ac5

diff --git a/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf b/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf
index 2b97f9d4ee70885a5010467bc0397fd7600b1b5e..340a6834687b20e6a8600fe1592c525d9e7007e5 100755 (executable)
Binary files a/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf and b/usrp/fpga/rbf/rev2/std_2rxhb_2tx.rbf differ

diff --git a/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf b/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf
index 2b97f9d4ee70885a5010467bc0397fd7600b1b5e..340a6834687b20e6a8600fe1592c525d9e7007e5 100755 (executable)
Binary files a/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf and b/usrp/fpga/rbf/rev4/std_2rxhb_2tx.rbf differ

diff --git a/usrp/fpga/sdr_lib/atr_delay.v b/usrp/fpga/sdr_lib/atr_delay.v
index a832421a1af66ba866abaf3a87adbe9eef2a8b19..bbba9e2916f7941068d0a9fae7b119280f35b618 100644 (file)
--- a/usrp/fpga/sdr_lib/atr_delay.v
+++ b/usrp/fpga/sdr_lib/atr_delay.v
@@ -24,12 +24,12 @@ module atr_delay(clk_i,rst_i,ena_i,tx_empty_i,tx_delay_i,rx_delay_i,atr_tx_o);
    input        rst_i;
    input        ena_i;
    input        tx_empty_i;
-   input [31:0] tx_delay_i;
-   input [31:0] rx_delay_i;
+   input [11:0] tx_delay_i;
+   input [11:0] rx_delay_i;
    output       atr_tx_o;
 
    reg [3:0]   state;
-   reg [31:0]  count;
+   reg [11:0]  count;
 
    `define ST_RX_DELAY 4'b0001
    `define ST_RX       4'b0010
@@ -40,7 +40,7 @@ module atr_delay(clk_i,rst_i,ena_i,tx_empty_i,tx_delay_i,rx_delay_i,atr_tx_o);
      if (rst_i | ~ena_i)
        begin
          state <= `ST_RX;
-         count <= 0;
+         count <= 12'b0;
        end
      else
        case (state)

diff --git a/usrp/fpga/sdr_lib/master_control.v b/usrp/fpga/sdr_lib/master_control.v
index 6befc4dfd29f31ba06e6379e5ea81c320e36d58c..3bce55f23ddbc936caec12eff8c13ef51356e9e7 100644 (file)
--- a/usrp/fpga/sdr_lib/master_control.v
+++ b/usrp/fpga/sdr_lib/master_control.v
@@ -114,7 +114,7 @@ module master_control
 
    wire        transmit_now;
    wire        atr_ctl;
-   wire [31:0] atr_tx_delay, atr_rx_delay;
+   wire [11:0] atr_tx_delay, atr_rx_delay;
    wire [15:0] atr_mask_0, atr_txval_0, atr_rxval_0, atr_mask_1, atr_txval_1, atr_rxval_1, atr_mask_2, atr_txval_2, atr_rxval_2, atr_mask_3, atr_txval_3, atr_rxval_3;
       
    setting_reg #(`FR_ATR_MASK_0) sr_atr_mask_0(.clock(master_clk),.reset(1'b0),.strobe(serial_strobe),.addr(serial_addr),.in(serial_data),.out(atr_mask_0));
@@ -139,7 +139,7 @@ module master_control
 
    assign      atr_ctl = 1'b1;
 
-   atr_delay atr_delay(.clk_i(master_clk),.rst_i(tx_dsp_reset),.ena_i(atr_ctl & enable_tx),.tx_empty_i(tx_empty),
+   atr_delay atr_delay(.clk_i(master_clk),.rst_i(tx_dsp_reset),.ena_i(atr_ctl),.tx_empty_i(tx_empty),
                       .tx_delay_i(atr_tx_delay),.rx_delay_i(atr_rx_delay),.atr_tx_o(transmit_now));
    
    wire [15:0] atr_selected_0 = transmit_now ? atr_txval_0 : atr_rxval_0;