X-Git-Url: https://git.gag.com/?a=blobdiff_plain;f=src%2Fstm%2Fao_timer.c;h=0d81b5de47e6170fccfe160f34a90f4f9c1fa97b;hb=7b1f4177d42e5e951a7db4289c847d355a785c2a;hp=91ede84bcc5ee7f4e015fb46b6188412c35b6746;hpb=4fa71ecf168e275b24534a5a20e3dd4e178c7bbd;p=fw%2Faltos

diff --git a/src/stm/ao_timer.c b/src/stm/ao_timer.c
index 91ede84b..0d81b5de 100644
--- a/src/stm/ao_timer.c
+++ b/src/stm/ao_timer.c
@@ -3,7 +3,8 @@
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful, but
  * WITHOUT ANY WARRANTY; without even the implied warranty of
@@ -25,6 +26,8 @@
 #define HAS_TICK 1
 #endif
 
+#if HAS_TICK || defined(AO_TIMER_HOOK)
+
 #if HAS_TICK
 volatile AO_TICK_TYPE ao_tick_count;
 
@@ -34,20 +37,37 @@ ao_time(void)
 	return ao_tick_count;
 }
 
+uint64_t
+ao_time_ns(void)
+{
+	AO_TICK_TYPE	before, after;
+	uint32_t	cvr;
+
+	do {
+		before = ao_tick_count;
+		cvr = stm_systick.cvr;
+		after = ao_tick_count;
+	} while (before != after);
+
+	return (uint64_t) after * (1000000000ULL / AO_HERTZ) +
+		(uint64_t) cvr * (1000000000ULL / AO_SYSTICK);
+}
+
+#endif
+
 #if AO_DATA_ALL
-volatile __data uint8_t	ao_data_interval = 1;
-volatile __data uint8_t	ao_data_count;
+volatile uint8_t	ao_data_interval = 1;
+volatile uint8_t	ao_data_count;
 #endif
 
 void stm_systick_isr(void)
 {
 	ao_validate_cur_stack();
 	if (stm_systick.csr & (1 << STM_SYSTICK_CSR_COUNTFLAG)) {
+#if HAS_TICK
 		++ao_tick_count;
-#if HAS_TASK_QUEUE
-		if (ao_task_alarm_tick && (int16_t) (ao_tick_count - ao_task_alarm_tick) >= 0)
-			ao_task_check_alarm((uint16_t) ao_tick_count);
 #endif
+		ao_task_check_alarm();
 #if AO_DATA_ALL
 		if (++ao_data_count == ao_data_interval) {
 			ao_data_count = 0;
@@ -89,6 +109,7 @@ ao_timer_init(void)
 	stm_systick.csr = ((1 << STM_SYSTICK_CSR_ENABLE) |
 			   (1 << STM_SYSTICK_CSR_TICKINT) |
 			   (STM_SYSTICK_CSR_CLKSOURCE_HCLK_8 << STM_SYSTICK_CSR_CLKSOURCE));
+	stm_nvic.shpr15_12 |= AO_STM_NVIC_CLOCK_PRIORITY << 24;
 }
 
 #endif
@@ -147,7 +168,7 @@ ao_clock_init(void)
 #define STM_RCC_CFGR_PLLSRC_TARGET_CLOCK	(0 << STM_RCC_CFGR_PLLSRC)
 #endif
 
-#if !AO_HSE || HAS_ADC
+#if !AO_HSE || HAS_ADC || HAS_ADC_SINGLE
 	/* Enable HSI RC clock 16MHz */
 	stm_rcc.cr |= (1 << STM_RCC_CR_HSION);
 	while (!(stm_rcc.cr & (1 << STM_RCC_CR_HSIRDY)))