openocd: remove CamelCase symbols *xPSR*
[fw/openocd] / src / target / armv8_dpm.c
index 017c175fcdbde8f355905050f6944043e5299381..3ea8fa9640ae84327cd6802a01093d1e8432806c 100644 (file)
@@ -601,7 +601,7 @@ int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode)
                                /* load SPSR with the desired mode and execute DRPS */
                                LOG_DEBUG("SPSR = 0x%08"PRIx32, cpsr);
                                retval = dpm->instr_write_data_r0(dpm,
-                                               ARMV8_MSR_GP_xPSR_T1(1, 0, 15), cpsr);
+                                               ARMV8_MSR_GP_XPSR_T1(1, 0, 15), cpsr);
                                if (retval == ERROR_OK)
                                        retval = dpm->instr_execute(dpm, armv8_opcode(armv8, ARMV8_OPC_DRPS));
                        }
@@ -917,7 +917,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
                if (!cache->reg_list[i].exist)
                        continue;
                /* skip PC and CPSR */
-               if (i == ARMV8_PC || i == ARMV8_xPSR)
+               if (i == ARMV8_PC || i == ARMV8_XPSR)
                        continue;
                /* skip invalid */
                if (!cache->reg_list[i].valid)
@@ -939,7 +939,7 @@ int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp)
 
        /* flush CPSR and PC */
        if (retval == ERROR_OK)
-               retval = dpmv8_write_reg(dpm, &cache->reg_list[ARMV8_xPSR], ARMV8_xPSR);
+               retval = dpmv8_write_reg(dpm, &cache->reg_list[ARMV8_XPSR], ARMV8_XPSR);
        if (retval == ERROR_OK)
                retval = dpmv8_write_reg(dpm, &cache->reg_list[ARMV8_PC], ARMV8_PC);
        /* flush R0 -- it's *very* dirty by now */
@@ -1293,9 +1293,9 @@ void armv8_dpm_handle_exception(struct arm_dpm *dpm, bool do_restore)
        unsigned int el;
 
        static const int clobbered_regs_by_el[3][5] = {
-               { ARMV8_PC, ARMV8_xPSR, ARMV8_ELR_EL1, ARMV8_ESR_EL1, ARMV8_SPSR_EL1 },
-               { ARMV8_PC, ARMV8_xPSR, ARMV8_ELR_EL2, ARMV8_ESR_EL2, ARMV8_SPSR_EL2 },
-               { ARMV8_PC, ARMV8_xPSR, ARMV8_ELR_EL3, ARMV8_ESR_EL3, ARMV8_SPSR_EL3 },
+               { ARMV8_PC, ARMV8_XPSR, ARMV8_ELR_EL1, ARMV8_ESR_EL1, ARMV8_SPSR_EL1 },
+               { ARMV8_PC, ARMV8_XPSR, ARMV8_ELR_EL2, ARMV8_ESR_EL2, ARMV8_SPSR_EL2 },
+               { ARMV8_PC, ARMV8_XPSR, ARMV8_ELR_EL3, ARMV8_ESR_EL3, ARMV8_SPSR_EL3 },
        };
 
        el = (dpm->dscr >> 8) & 3;
@@ -1310,7 +1310,7 @@ void armv8_dpm_handle_exception(struct arm_dpm *dpm, bool do_restore)
        mem_ap_write_u32(armv8->debug_ap,
                armv8->debug_base + CPUV8_DBG_DRCR, DRCR_CSE);
 
-       armv8->read_reg_u64(armv8, ARMV8_xPSR, &dlr);
+       armv8->read_reg_u64(armv8, ARMV8_XPSR, &dlr);
        dspsr = dlr;
        armv8->read_reg_u64(armv8, ARMV8_PC, &dlr);