//
// This header file was automatically generated by:
//
-// inc2h.pl V1.6
+// inc2h.pl V4585
//
// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
//
// Memory organization.
//
-#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000 // INDF
-#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000 // TMR0
-#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000 // PCL
-#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000 // STATUS
-#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000 // FSR
-#pragma memmap PORTA_ADDR PORTA_ADDR SFR 0x000 // PORTA
-#pragma memmap PORTB_ADDR PORTB_ADDR SFR 0x000 // PORTB
-#pragma memmap PORTC_ADDR PORTC_ADDR SFR 0x000 // PORTC
-#pragma memmap PORTE_ADDR PORTE_ADDR SFR 0x000 // PORTE
-#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000 // PCLATH
-#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000 // INTCON
-#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000 // PIR1
-#pragma memmap PIR2_ADDR PIR2_ADDR SFR 0x000 // PIR2
-#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000 // TMR1L
-#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000 // TMR1H
-#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000 // T1CON
-#pragma memmap TMR2_ADDR TMR2_ADDR SFR 0x000 // TMR2
-#pragma memmap T2CON_ADDR T2CON_ADDR SFR 0x000 // T2CON
-#pragma memmap SSPBUF_ADDR SSPBUF_ADDR SFR 0x000 // SSPBUF
-#pragma memmap SSPCON_ADDR SSPCON_ADDR SFR 0x000 // SSPCON
-#pragma memmap CCPR1L_ADDR CCPR1L_ADDR SFR 0x000 // CCPR1L
-#pragma memmap CCPR1H_ADDR CCPR1H_ADDR SFR 0x000 // CCPR1H
-#pragma memmap CCP1CON_ADDR CCP1CON_ADDR SFR 0x000 // CCP1CON
-#pragma memmap RCSTA_ADDR RCSTA_ADDR SFR 0x000 // RCSTA
-#pragma memmap TXREG_ADDR TXREG_ADDR SFR 0x000 // TXREG
-#pragma memmap RCREG_ADDR RCREG_ADDR SFR 0x000 // RCREG
-#pragma memmap ADRESH_ADDR ADRESH_ADDR SFR 0x000 // ADRESH
-#pragma memmap ADCON0_ADDR ADCON0_ADDR SFR 0x000 // ADCON0
-#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000 // OPTION_REG
-#pragma memmap TRISA_ADDR TRISA_ADDR SFR 0x000 // TRISA
-#pragma memmap TRISB_ADDR TRISB_ADDR SFR 0x000 // TRISB
-#pragma memmap TRISC_ADDR TRISC_ADDR SFR 0x000 // TRISC
-#pragma memmap TRISE_ADDR TRISE_ADDR SFR 0x000 // TRISE
-#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000 // PIE1
-#pragma memmap PIE2_ADDR PIE2_ADDR SFR 0x000 // PIE2
-#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000 // PCON
-#pragma memmap OSCCON_ADDR OSCCON_ADDR SFR 0x000 // OSCCON
-#pragma memmap OSCTUNE_ADDR OSCTUNE_ADDR SFR 0x000 // OSCTUNE
-#pragma memmap ANSEL_ADDR ANSEL_ADDR SFR 0x000 // ANSEL
-#pragma memmap PR2_ADDR PR2_ADDR SFR 0x000 // PR2
-#pragma memmap SSPADD_ADDR SSPADD_ADDR SFR 0x000 // SSPADD
-#pragma memmap SSPSTAT_ADDR SSPSTAT_ADDR SFR 0x000 // SSPSTAT
-#pragma memmap WPUB_ADDR WPUB_ADDR SFR 0x000 // WPUB
-#pragma memmap WPU_ADDR WPU_ADDR SFR 0x000 // WPU
-#pragma memmap IOCB_ADDR IOCB_ADDR SFR 0x000 // IOCB
-#pragma memmap IOC_ADDR IOC_ADDR SFR 0x000 // IOC
-#pragma memmap CMCON1_ADDR CMCON1_ADDR SFR 0x000 // CMCON1
-#pragma memmap TXSTA_ADDR TXSTA_ADDR SFR 0x000 // TXSTA
-#pragma memmap SPBRG_ADDR SPBRG_ADDR SFR 0x000 // SPBRG
-#pragma memmap CMCON0_ADDR CMCON0_ADDR SFR 0x000 // CMCON0
-#pragma memmap VRCON_ADDR VRCON_ADDR SFR 0x000 // VRCON
-#pragma memmap ADRESL_ADDR ADRESL_ADDR SFR 0x000 // ADRESL
-#pragma memmap ADCON1_ADDR ADCON1_ADDR SFR 0x000 // ADCON1
-#pragma memmap WDTCON_ADDR WDTCON_ADDR SFR 0x000 // WDTCON
-#pragma memmap LCDCON_ADDR LCDCON_ADDR SFR 0x000 // LCDCON
-#pragma memmap LCDPS_ADDR LCDPS_ADDR SFR 0x000 // LCDPS
-#pragma memmap LVDCON_ADDR LVDCON_ADDR SFR 0x000 // LVDCON
-#pragma memmap EEDATL_ADDR EEDATL_ADDR SFR 0x000 // EEDATL
-#pragma memmap EEADRL_ADDR EEADRL_ADDR SFR 0x000 // EEADRL
-#pragma memmap EEDATH_ADDR EEDATH_ADDR SFR 0x000 // EEDATH
-#pragma memmap EEADRH_ADDR EEADRH_ADDR SFR 0x000 // EEADRH
-#pragma memmap LCDDATA0_ADDR LCDDATA0_ADDR SFR 0x000 // LCDDATA0
-#pragma memmap LCDDATA1_ADDR LCDDATA1_ADDR SFR 0x000 // LCDDATA1
-#pragma memmap LCDDATA3_ADDR LCDDATA3_ADDR SFR 0x000 // LCDDATA3
-#pragma memmap LCDDATA4_ADDR LCDDATA4_ADDR SFR 0x000 // LCDDATA4
-#pragma memmap LCDDATA6_ADDR LCDDATA6_ADDR SFR 0x000 // LCDDATA6
-#pragma memmap LCDDATA7_ADDR LCDDATA7_ADDR SFR 0x000 // LCDDATA7
-#pragma memmap LCDDATA9_ADDR LCDDATA9_ADDR SFR 0x000 // LCDDATA9
-#pragma memmap LCDDATA10_ADDR LCDDATA10_ADDR SFR 0x000 // LCDDATA10
-#pragma memmap LCDSE0_ADDR LCDSE0_ADDR SFR 0x000 // LCDSE0
-#pragma memmap LCDSE1_ADDR LCDSE1_ADDR SFR 0x000 // LCDSE1
-#pragma memmap EECON1_ADDR EECON1_ADDR SFR 0x000 // EECON1
-#pragma memmap EECON2_ADDR EECON2_ADDR SFR 0x000 // EECON2
// LIST
-// P16F913.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
+// P16F913.INC Standard Header File, Version 1.04 Microchip Technology, Inc.
// NOLIST
// This header file defines configurations, registers, and other useful bits of
//1.00 06/11/04 Initial Release
//1.01 06/18/04 Corrected typo in 'bad ram' section
//1.02 08/16/04 Added EECON2
+//1.03 05/20/05 Removed EECON2 from badram
+//1.04 10/05/05 Correct names of bits in ANSEL, Add EEADRH and EEADRL bit
+// definitions
//==========================================================================
//----- Register Files------------------------------------------------------
-extern __data __at (INDF_ADDR) volatile char INDF;
+extern __sfr __at (INDF_ADDR) INDF;
extern __sfr __at (TMR0_ADDR) TMR0;
-extern __data __at (PCL_ADDR) volatile char PCL;
+extern __sfr __at (PCL_ADDR) PCL;
extern __sfr __at (STATUS_ADDR) STATUS;
extern __sfr __at (FSR_ADDR) FSR;
extern __sfr __at (PORTA_ADDR) PORTA;
//----- ADCON0 Bits --------------------------------------------------------
-//----- OPTION Bits -----------------------------------------------------
+//----- OPTION_REG Bits -----------------------------------------------------
//----- PIE1 Bits ----------------------------------------------------------
//----- EECON1 Bits --------------------------------------------------------
+//----- EEADRH Bits --------------------------------------------------------
+
+
+//----- EEADRL Bits --------------------------------------------------------
+
+
//==========================================================================
//
// __BADRAM H'08', H'1B'-H'1D'
// __BADRAM H'88', H'9A'-H'9B'
// __BADRAM H'112', H'115', H'118', H'11B',H'11E'-H'11F'
-// __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF'
+// __BADRAM H'185', H'187'-H'189', H'18E'-H'1EF'
//==========================================================================
//
// ----- ANSEL bits --------------------
typedef union {
+ struct {
+ unsigned char ANS0:1;
+ unsigned char ANS1:1;
+ unsigned char ANS2:1;
+ unsigned char ANS3:1;
+ unsigned char ANS4:1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ };
struct {
unsigned char AN0:1;
unsigned char AN1:1;
} __ANSEL_bits_t;
extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
+#define ANS0 ANSEL_bits.ANS0
#define AN0 ANSEL_bits.AN0
+#define ANS1 ANSEL_bits.ANS1
#define AN1 ANSEL_bits.AN1
+#define ANS2 ANSEL_bits.ANS2
#define AN2 ANSEL_bits.AN2
+#define ANS3 ANSEL_bits.ANS3
#define AN3 ANSEL_bits.AN3
+#define ANS4 ANSEL_bits.ANS4
#define AN4 ANSEL_bits.AN4
// ----- CCP1CON bits --------------------
#define C2SYNC CMCON1_bits.C2SYNC
#define T1GSS CMCON1_bits.T1GSS
+// ----- EEADRH bits --------------------
+typedef union {
+ struct {
+ unsigned char EEADRH0:1;
+ unsigned char EEADRH1:1;
+ unsigned char EEADRH2:1;
+ unsigned char EEADRH3:1;
+ unsigned char EEADRH4:1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ };
+} __EEADRH_bits_t;
+extern volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits;
+
+#define EEADRH0 EEADRH_bits.EEADRH0
+#define EEADRH1 EEADRH_bits.EEADRH1
+#define EEADRH2 EEADRH_bits.EEADRH2
+#define EEADRH3 EEADRH_bits.EEADRH3
+#define EEADRH4 EEADRH_bits.EEADRH4
+
+// ----- EEADRL bits --------------------
+typedef union {
+ struct {
+ unsigned char EEADRL0:1;
+ unsigned char EEADRL1:1;
+ unsigned char EEADRL2:1;
+ unsigned char EEADRL3:1;
+ unsigned char EEADRL4:1;
+ unsigned char EEADRL5:1;
+ unsigned char EEADRL6:1;
+ unsigned char EEADRL7:1;
+ };
+} __EEADRL_bits_t;
+extern volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits;
+
+#define EEADRL0 EEADRL_bits.EEADRL0
+#define EEADRL1 EEADRL_bits.EEADRL1
+#define EEADRL2 EEADRL_bits.EEADRL2
+#define EEADRL3 EEADRL_bits.EEADRL3
+#define EEADRL4 EEADRL_bits.EEADRL4
+#define EEADRL5 EEADRL_bits.EEADRL5
+#define EEADRL6 EEADRL_bits.EEADRL6
+#define EEADRL7 EEADRL_bits.EEADRL7
+
// ----- EECON1 bits --------------------
typedef union {
struct {
#define C2IF PIR2_bits.C2IF
#define OSFIF PIR2_bits.OSFIF
+// ----- PORTA bits --------------------
+typedef union {
+ struct {
+ unsigned char RA0:1;
+ unsigned char RA1:1;
+ unsigned char RA2:1;
+ unsigned char RA3:1;
+ unsigned char RA4:1;
+ unsigned char RA5:1;
+ unsigned char :1;
+ unsigned char :1;
+ };
+} __PORTA_bits_t;
+extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
+
+#define RA0 PORTA_bits.RA0
+#define RA1 PORTA_bits.RA1
+#define RA2 PORTA_bits.RA2
+#define RA3 PORTA_bits.RA3
+#define RA4 PORTA_bits.RA4
+#define RA5 PORTA_bits.RA5
+
+// ----- PORTB bits --------------------
+typedef union {
+ struct {
+ unsigned char RB0:1;
+ unsigned char RB1:1;
+ unsigned char RB2:1;
+ unsigned char RB3:1;
+ unsigned char RB4:1;
+ unsigned char RB5:1;
+ unsigned char RB6:1;
+ unsigned char RB7:1;
+ };
+} __PORTB_bits_t;
+extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
+
+#define RB0 PORTB_bits.RB0
+#define RB1 PORTB_bits.RB1
+#define RB2 PORTB_bits.RB2
+#define RB3 PORTB_bits.RB3
+#define RB4 PORTB_bits.RB4
+#define RB5 PORTB_bits.RB5
+#define RB6 PORTB_bits.RB6
+#define RB7 PORTB_bits.RB7
+
+// ----- PORTC bits --------------------
+typedef union {
+ struct {
+ unsigned char RC0:1;
+ unsigned char RC1:1;
+ unsigned char RC2:1;
+ unsigned char RC3:1;
+ unsigned char RC4:1;
+ unsigned char RC5:1;
+ unsigned char RC6:1;
+ unsigned char RC7:1;
+ };
+} __PORTC_bits_t;
+extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
+
+#define RC0 PORTC_bits.RC0
+#define RC1 PORTC_bits.RC1
+#define RC2 PORTC_bits.RC2
+#define RC3 PORTC_bits.RC3
+#define RC4 PORTC_bits.RC4
+#define RC5 PORTC_bits.RC5
+#define RC6 PORTC_bits.RC6
+#define RC7 PORTC_bits.RC7
+
+// ----- PORTE bits --------------------
+typedef union {
+ struct {
+ unsigned char RE0:1;
+ unsigned char RE1:1;
+ unsigned char RE2:1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ };
+} __PORTE_bits_t;
+extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
+
+#define RE0 PORTE_bits.RE0
+#define RE1 PORTE_bits.RE1
+#define RE2 PORTE_bits.RE2
+
// ----- RCSTA bits --------------------
typedef union {
struct {
#define TOUTPS2 T2CON_bits.TOUTPS2
#define TOUTPS3 T2CON_bits.TOUTPS3
+// ----- TRISA bits --------------------
+typedef union {
+ struct {
+ unsigned char TRISA0:1;
+ unsigned char TRISA1:1;
+ unsigned char TRISA2:1;
+ unsigned char TRISA3:1;
+ unsigned char TRISA4:1;
+ unsigned char TRISA5:1;
+ unsigned char :1;
+ unsigned char :1;
+ };
+} __TRISA_bits_t;
+extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
+
+#define TRISA0 TRISA_bits.TRISA0
+#define TRISA1 TRISA_bits.TRISA1
+#define TRISA2 TRISA_bits.TRISA2
+#define TRISA3 TRISA_bits.TRISA3
+#define TRISA4 TRISA_bits.TRISA4
+#define TRISA5 TRISA_bits.TRISA5
+
+// ----- TRISB bits --------------------
+typedef union {
+ struct {
+ unsigned char TRISB0:1;
+ unsigned char TRISB1:1;
+ unsigned char TRISB2:1;
+ unsigned char TRISB3:1;
+ unsigned char TRISB4:1;
+ unsigned char TRISB5:1;
+ unsigned char TRISB6:1;
+ unsigned char TRISB7:1;
+ };
+} __TRISB_bits_t;
+extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
+
+#define TRISB0 TRISB_bits.TRISB0
+#define TRISB1 TRISB_bits.TRISB1
+#define TRISB2 TRISB_bits.TRISB2
+#define TRISB3 TRISB_bits.TRISB3
+#define TRISB4 TRISB_bits.TRISB4
+#define TRISB5 TRISB_bits.TRISB5
+#define TRISB6 TRISB_bits.TRISB6
+#define TRISB7 TRISB_bits.TRISB7
+
+// ----- TRISC bits --------------------
+typedef union {
+ struct {
+ unsigned char TRISC0:1;
+ unsigned char TRISC1:1;
+ unsigned char TRISC2:1;
+ unsigned char TRISC3:1;
+ unsigned char TRISC4:1;
+ unsigned char TRISC5:1;
+ unsigned char TRISC6:1;
+ unsigned char TRISC7:1;
+ };
+} __TRISC_bits_t;
+extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
+
+#define TRISC0 TRISC_bits.TRISC0
+#define TRISC1 TRISC_bits.TRISC1
+#define TRISC2 TRISC_bits.TRISC2
+#define TRISC3 TRISC_bits.TRISC3
+#define TRISC4 TRISC_bits.TRISC4
+#define TRISC5 TRISC_bits.TRISC5
+#define TRISC6 TRISC_bits.TRISC6
+#define TRISC7 TRISC_bits.TRISC7
+
+// ----- TRISE bits --------------------
+typedef union {
+ struct {
+ unsigned char TRISE0:1;
+ unsigned char TRISE1:1;
+ unsigned char TRISE2:1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ };
+} __TRISE_bits_t;
+extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
+
+#define TRISE0 TRISE_bits.TRISE0
+#define TRISE1 TRISE_bits.TRISE1
+#define TRISE2 TRISE_bits.TRISE2
+
// ----- TXSTA bits --------------------
typedef union {
struct {
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