//
// This header file was automatically generated by:
//
-// inc2h.pl V1.7
+// inc2h.pl V4783
//
// Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
//
// Memory organization.
//
-#pragma memmap INDF_ADDR INDF_ADDR SFR 0x000 // INDF
-#pragma memmap TMR0_ADDR TMR0_ADDR SFR 0x000 // TMR0
-#pragma memmap PCL_ADDR PCL_ADDR SFR 0x000 // PCL
-#pragma memmap STATUS_ADDR STATUS_ADDR SFR 0x000 // STATUS
-#pragma memmap FSR_ADDR FSR_ADDR SFR 0x000 // FSR
-#pragma memmap GPIO_ADDR GPIO_ADDR SFR 0x000 // GPIO
-#pragma memmap PCLATH_ADDR PCLATH_ADDR SFR 0x000 // PCLATH
-#pragma memmap INTCON_ADDR INTCON_ADDR SFR 0x000 // INTCON
-#pragma memmap PIR1_ADDR PIR1_ADDR SFR 0x000 // PIR1
-#pragma memmap TMR1L_ADDR TMR1L_ADDR SFR 0x000 // TMR1L
-#pragma memmap TMR1H_ADDR TMR1H_ADDR SFR 0x000 // TMR1H
-#pragma memmap T1CON_ADDR T1CON_ADDR SFR 0x000 // T1CON
-#pragma memmap CMCON_ADDR CMCON_ADDR SFR 0x000 // CMCON
-#pragma memmap ADRESH_ADDR ADRESH_ADDR SFR 0x000 // ADRESH
-#pragma memmap ADCON0_ADDR ADCON0_ADDR SFR 0x000 // ADCON0
-#pragma memmap OPTION_REG_ADDR OPTION_REG_ADDR SFR 0x000 // OPTION_REG
-#pragma memmap TRISIO_ADDR TRISIO_ADDR SFR 0x000 // TRISIO
-#pragma memmap PIE1_ADDR PIE1_ADDR SFR 0x000 // PIE1
-#pragma memmap PCON_ADDR PCON_ADDR SFR 0x000 // PCON
-#pragma memmap OSCCAL_ADDR OSCCAL_ADDR SFR 0x000 // OSCCAL
-#pragma memmap WPU_ADDR WPU_ADDR SFR 0x000 // WPU
-#pragma memmap IOC_ADDR IOC_ADDR SFR 0x000 // IOC
-#pragma memmap IOCB_ADDR IOCB_ADDR SFR 0x000 // IOCB
-#pragma memmap VRCON_ADDR VRCON_ADDR SFR 0x000 // VRCON
-#pragma memmap EEDATA_ADDR EEDATA_ADDR SFR 0x000 // EEDATA
-#pragma memmap EEDAT_ADDR EEDAT_ADDR SFR 0x000 // EEDAT
-#pragma memmap EEADR_ADDR EEADR_ADDR SFR 0x000 // EEADR
-#pragma memmap EECON1_ADDR EECON1_ADDR SFR 0x000 // EECON1
-#pragma memmap EECON2_ADDR EECON2_ADDR SFR 0x000 // EECON2
-#pragma memmap ADRESL_ADDR ADRESL_ADDR SFR 0x000 // ADRESL
-#pragma memmap ANSEL_ADDR ANSEL_ADDR SFR 0x000 // ANSEL
// LIST
//----- Register Files------------------------------------------------------
-extern __data __at (INDF_ADDR) volatile char INDF;
+extern __sfr __at (INDF_ADDR) INDF;
extern __sfr __at (TMR0_ADDR) TMR0;
-extern __data __at (PCL_ADDR) volatile char PCL;
+extern __sfr __at (PCL_ADDR) PCL;
extern __sfr __at (STATUS_ADDR) STATUS;
extern __sfr __at (FSR_ADDR) FSR;
extern __sfr __at (GPIO_ADDR) GPIO;
//----- T1CON Bits ---------------------------------------------------------
-//----- CMCON Bits --------------------------------------------------------
+//----- COMCON Bits --------------------------------------------------------
//----- ADCON0 Bits --------------------------------------------------------
} __ADCON0_bits_t;
extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
+#ifndef NO_BIT_DEFINES
#define ADON ADCON0_bits.ADON
#define GO ADCON0_bits.GO
#define NOT_DONE ADCON0_bits.NOT_DONE
#define CHS1 ADCON0_bits.CHS1
#define VCFG ADCON0_bits.VCFG
#define ADFM ADCON0_bits.ADFM
+#endif /* NO_BIT_DEFINES */
+
+// ----- ANSEL bits --------------------
+typedef union {
+ struct {
+ unsigned char ANS0:1;
+ unsigned char ANS1:1;
+ unsigned char ANS2:1;
+ unsigned char ANS3:1;
+ unsigned char ADCS0:1;
+ unsigned char ADCS1:1;
+ unsigned char ADCS2:1;
+ unsigned char :1;
+ };
+} __ANSEL_bits_t;
+extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
+
+#ifndef NO_BIT_DEFINES
+#define ANS0 ANSEL_bits.ANS0
+#define ANS1 ANSEL_bits.ANS1
+#define ANS2 ANSEL_bits.ANS2
+#define ANS3 ANSEL_bits.ANS3
+#define ADCS0 ANSEL_bits.ADCS0
+#define ADCS1 ANSEL_bits.ADCS1
+#define ADCS2 ANSEL_bits.ADCS2
+#endif /* NO_BIT_DEFINES */
// ----- CMCON bits --------------------
typedef union {
} __CMCON_bits_t;
extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits;
+#ifndef NO_BIT_DEFINES
#define CM0 CMCON_bits.CM0
#define CM1 CMCON_bits.CM1
#define CM2 CMCON_bits.CM2
#define CIS CMCON_bits.CIS
#define CINV CMCON_bits.CINV
#define COUT CMCON_bits.COUT
+#endif /* NO_BIT_DEFINES */
+
+// ----- EECON1 bits --------------------
+typedef union {
+ struct {
+ unsigned char RD:1;
+ unsigned char WR:1;
+ unsigned char WREN:1;
+ unsigned char WRERR:1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ unsigned char :1;
+ };
+} __EECON1_bits_t;
+extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
+
+#ifndef NO_BIT_DEFINES
+#define RD EECON1_bits.RD
+#define WR EECON1_bits.WR
+#define WREN EECON1_bits.WREN
+#define WRERR EECON1_bits.WRERR
+#endif /* NO_BIT_DEFINES */
// ----- GPIO bits --------------------
typedef union {
} __GPIO_bits_t;
extern volatile __GPIO_bits_t __at(GPIO_ADDR) GPIO_bits;
+#ifndef NO_BIT_DEFINES
#define GP0 GPIO_bits.GP0
#define GPIO0 GPIO_bits.GPIO0
#define GP1 GPIO_bits.GP1
#define GPIO4 GPIO_bits.GPIO4
#define GP5 GPIO_bits.GP5
#define GPIO5 GPIO_bits.GPIO5
+#endif /* NO_BIT_DEFINES */
// ----- INTCON bits --------------------
typedef union {
} __INTCON_bits_t;
extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
+#ifndef NO_BIT_DEFINES
#define GPIF INTCON_bits.GPIF
#define INTF INTCON_bits.INTF
#define T0IF INTCON_bits.T0IF
#define T0IE INTCON_bits.T0IE
#define PEIE INTCON_bits.PEIE
#define GIE INTCON_bits.GIE
+#endif /* NO_BIT_DEFINES */
// ----- IOC bits --------------------
typedef union {
} __IOC_bits_t;
extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
+#ifndef NO_BIT_DEFINES
#define IOC0 IOC_bits.IOC0
#define IOC1 IOC_bits.IOC1
#define IOC2 IOC_bits.IOC2
#define IOC3 IOC_bits.IOC3
#define IOC4 IOC_bits.IOC4
#define IOC5 IOC_bits.IOC5
+#endif /* NO_BIT_DEFINES */
// ----- IOCB bits --------------------
typedef union {
} __IOCB_bits_t;
extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
+#ifndef NO_BIT_DEFINES
#define IOCB0 IOCB_bits.IOCB0
#define IOCB1 IOCB_bits.IOCB1
#define IOCB2 IOCB_bits.IOCB2
#define IOCB3 IOCB_bits.IOCB3
#define IOCB4 IOCB_bits.IOCB4
#define IOCB5 IOCB_bits.IOCB5
+#endif /* NO_BIT_DEFINES */
// ----- OPTION_REG bits --------------------
typedef union {
} __OPTION_REG_bits_t;
extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
+#ifndef NO_BIT_DEFINES
#define PS0 OPTION_REG_bits.PS0
#define PS1 OPTION_REG_bits.PS1
#define PS2 OPTION_REG_bits.PS2
#define T0CS OPTION_REG_bits.T0CS
#define INTEDG OPTION_REG_bits.INTEDG
#define NOT_GPPU OPTION_REG_bits.NOT_GPPU
+#endif /* NO_BIT_DEFINES */
// ----- OSCCAL bits --------------------
typedef union {
} __OSCCAL_bits_t;
extern volatile __OSCCAL_bits_t __at(OSCCAL_ADDR) OSCCAL_bits;
+#ifndef NO_BIT_DEFINES
#define CAL0 OSCCAL_bits.CAL0
#define CAL1 OSCCAL_bits.CAL1
#define CAL2 OSCCAL_bits.CAL2
#define CAL3 OSCCAL_bits.CAL3
#define CAL4 OSCCAL_bits.CAL4
#define CAL5 OSCCAL_bits.CAL5
+#endif /* NO_BIT_DEFINES */
// ----- PCON bits --------------------
typedef union {
} __PCON_bits_t;
extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
+#ifndef NO_BIT_DEFINES
#define NOT_BOD PCON_bits.NOT_BOD
#define NOT_POR PCON_bits.NOT_POR
+#endif /* NO_BIT_DEFINES */
// ----- PIE1 bits --------------------
typedef union {
} __PIE1_bits_t;
extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
+#ifndef NO_BIT_DEFINES
#define T1IE PIE1_bits.T1IE
#define TMR1IE PIE1_bits.TMR1IE
#define CMIE PIE1_bits.CMIE
#define ADIE PIE1_bits.ADIE
#define EEIE PIE1_bits.EEIE
+#endif /* NO_BIT_DEFINES */
// ----- PIR1 bits --------------------
typedef union {
} __PIR1_bits_t;
extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
+#ifndef NO_BIT_DEFINES
#define T1IF PIR1_bits.T1IF
#define TMR1IF PIR1_bits.TMR1IF
#define CMIF PIR1_bits.CMIF
#define ADIF PIR1_bits.ADIF
#define EEIF PIR1_bits.EEIF
+#endif /* NO_BIT_DEFINES */
// ----- STATUS bits --------------------
typedef union {
} __STATUS_bits_t;
extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
+#ifndef NO_BIT_DEFINES
#define C STATUS_bits.C
#define DC STATUS_bits.DC
#define Z STATUS_bits.Z
#define RP0 STATUS_bits.RP0
#define RP1 STATUS_bits.RP1
#define IRP STATUS_bits.IRP
+#endif /* NO_BIT_DEFINES */
// ----- T1CON bits --------------------
typedef union {
} __T1CON_bits_t;
extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
+#ifndef NO_BIT_DEFINES
#define TMR1ON T1CON_bits.TMR1ON
#define TMR1CS T1CON_bits.TMR1CS
#define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
#define T1CKPS0 T1CON_bits.T1CKPS0
#define T1CKPS1 T1CON_bits.T1CKPS1
#define TMR1GE T1CON_bits.TMR1GE
+#endif /* NO_BIT_DEFINES */
+
+// ----- TRISIO bits -------------------
+typedef union {
+ struct {
+ unsigned char TRISIO0:1;
+ unsigned char TRISIO1:1;
+ unsigned char TRISIO2:1;
+ unsigned char TRISIO3:1;
+ unsigned char TRISIO4:1;
+ unsigned char TRISIO5:1;
+ unsigned char :1;
+ unsigned char :1;
+ };
+} __TRISIO_bits_t;
+extern volatile __TRISIO_bits_t __at(TRISIO_ADDR) TRISIO_bits;
+
+#ifndef NO_BIT_DEFINES
+#define TRISIO0 TRISIO_bits.TRISIO0
+#define TRISIO1 TRISIO_bits.TRISIO1
+#define TRISIO2 TRISIO_bits.TRISIO2
+#define TRISIO3 TRISIO_bits.TRISIO3
+#define TRISIO4 TRISIO_bits.TRISIO4
+#define TRISIO5 TRISIO_bits.TRISIO5
+#endif /* NO_BIT_DEFINES */
// ----- VRCON bits --------------------
typedef union {
unsigned char VR1:1;
unsigned char VR2:1;
unsigned char VR3:1;
- unsigned char ADCS0:1;
- unsigned char VRR:1;
- unsigned char ADCS2:1;
- unsigned char VREN:1;
- };
- struct {
- unsigned char RD:1;
- unsigned char WR:1;
- unsigned char WREN:1;
- unsigned char WRERR:1;
- unsigned char :1;
- unsigned char ADCS1:1;
- unsigned char :1;
- unsigned char :1;
- };
- struct {
- unsigned char ANS0:1;
- unsigned char ANS1:1;
- unsigned char ANS2:1;
- unsigned char ANS3:1;
- unsigned char :1;
- unsigned char :1;
unsigned char :1;
+ unsigned char VRR:1;
unsigned char :1;
+ unsigned char VREN:1;
};
} __VRCON_bits_t;
extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
+#ifndef NO_BIT_DEFINES
#define VR0 VRCON_bits.VR0
-#define RD VRCON_bits.RD
-#define ANS0 VRCON_bits.ANS0
#define VR1 VRCON_bits.VR1
-#define WR VRCON_bits.WR
-#define ANS1 VRCON_bits.ANS1
#define VR2 VRCON_bits.VR2
-#define WREN VRCON_bits.WREN
-#define ANS2 VRCON_bits.ANS2
#define VR3 VRCON_bits.VR3
-#define WRERR VRCON_bits.WRERR
-#define ANS3 VRCON_bits.ANS3
-#define ADCS0 VRCON_bits.ADCS0
#define VRR VRCON_bits.VRR
-#define ADCS1 VRCON_bits.ADCS1
-#define ADCS2 VRCON_bits.ADCS2
#define VREN VRCON_bits.VREN
+#endif /* NO_BIT_DEFINES */
#endif
projects / fw / sdcc / blobdiff