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   1 /*
   2  * Copyright 2010 Free Software Foundation, Inc.
   3  *
   4  * Copyright 2010 Ettus Research LLC
   5  *
   6  * This program is free software: you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation, either version 3 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  *
  19  */
  20
  21 #include "adf4350_regs.h"
  22 #include "adf4350.h"
  23 #include "db_wbxng.h"
  24
  25 #define _REG_SHIFT(reg, shift) (((uint32_t)(reg)) << (shift))
  26
  27 /* reg 0 */
  28 /* reg 1 */
  29 static const uint16_t adf4350_regs_phase = 0;                           /* 0 */
  30 /* reg 2 */
  31 static const uint8_t adf4350_regs_low_noise_and_low_spur_modes = 3;     /* low noise mode */
  32 static const uint8_t adf4350_regs_muxout = 3;                           /* digital lock detect */
  33 static const uint8_t adf4350_regs_reference_doubler = 0;                /* disabled */
  34 static const uint8_t adf4350_regs_rdiv2 = 1;                            /* disabled */
  35 static const uint8_t adf4350_regs_double_buff = 0;                      /* disabled */
  36 static const uint8_t adf4350_regs_charge_pump_setting = 5;              /* 2.50 mA */
  37 static const uint8_t adf4350_regs_ldf = 0;                              /* frac-n */
  38 static const uint8_t adf4350_regs_ldp = 0;                              /* 10 ns */
  39 static const uint8_t adf4350_regs_pd_polarity = 1;                      /* positive */
  40 static const uint8_t adf4350_regs_power_down = 0;                       /* disabled */
  41 static const uint8_t adf4350_regs_cp_three_state = 0;                   /* disabled */
  42 static const uint8_t adf4350_regs_counter_reset = 0;                    /* disabled */
  43 /* reg 3 */
  44 static const uint8_t adf4350_regs_csr = 0;                              /* disabled */
  45 static const uint8_t adf4350_regs_clk_div_mode = 0;                     /* clock divider off */
  46 static const uint16_t adf4350_regs_12_bit_clock_divider_value = 0;      /* 0 */
  47 /* reg 4 */
  48 static const uint8_t adf4350_regs_feedback_select = 1;                  /* fundamental */
  49 static const uint8_t adf4350_regs_vco_power_down = 0;                   /* vco powered up */
  50 static const uint8_t adf4350_regs_mtld = 0;                             /* mute disabled */
  51 static const uint8_t adf4350_regs_aux_output_select = 1;                /* divided output */
  52 static const uint8_t adf4350_regs_aux_output_enable = 1;                /* disabled */
  53 static const uint8_t adf4350_regs_aux_output_power = 0;                 /* -4 */
  54 static const uint8_t adf4350_regs_rf_output_enable = 1;                 /* enabled */
  55 static const uint8_t adf4350_regs_output_power = 3;                     /* -1 */
  56 /* reg 5 */
  57 static const uint8_t adf4350_regs_ld_pin_mode = 1;                      /* digital lock detect */
  58
  59 void adf4350_load_register(uint8_t addr, struct db_base *dbb){
  60         struct db_wbxng_dummy *db = (struct db_wbxng_dummy *) dbb;
  61         uint32_t data;
  62         switch (addr){
  63                 case 0: data = (
  64                         _REG_SHIFT(db->common.adf4350_regs_int, 15)                |
  65                         _REG_SHIFT(db->common.adf4350_regs_frac, 3)); break;
  66                 case 1: data = (
  67                         _REG_SHIFT(db->common.adf4350_regs_prescaler, 27)          |
  68                         _REG_SHIFT(adf4350_regs_phase, 15)                         |
  69                         _REG_SHIFT(db->common.adf4350_regs_mod, 3)); break;
  70                 case 2: data = (
  71                         _REG_SHIFT(adf4350_regs_low_noise_and_low_spur_modes, 29)  |
  72                         _REG_SHIFT(adf4350_regs_muxout, 26)                        |
  73                         _REG_SHIFT(adf4350_regs_reference_doubler, 25)             |
  74                         _REG_SHIFT(adf4350_regs_rdiv2, 24)                         |
  75                         _REG_SHIFT(db->common.adf4350_regs_10_bit_r_counter, 14)   |
  76                         _REG_SHIFT(adf4350_regs_double_buff, 13)                   |
  77                         _REG_SHIFT(adf4350_regs_charge_pump_setting, 9)            |
  78                         _REG_SHIFT(adf4350_regs_ldf, 8)                            |
  79                         _REG_SHIFT(adf4350_regs_ldp, 7)                            |
  80                         _REG_SHIFT(adf4350_regs_pd_polarity, 6)                    |
  81                         _REG_SHIFT(adf4350_regs_power_down, 5)                     |
  82                         _REG_SHIFT(adf4350_regs_cp_three_state, 4)                 |
  83                         _REG_SHIFT(adf4350_regs_counter_reset, 3)); break;
  84                 case 3: data = (
  85                         _REG_SHIFT(adf4350_regs_csr, 18)                           |
  86                         _REG_SHIFT(adf4350_regs_clk_div_mode, 15)                  |
  87                         _REG_SHIFT(adf4350_regs_12_bit_clock_divider_value, 3)); break;
  88                 case 4: data = (
  89                         _REG_SHIFT(adf4350_regs_feedback_select, 23)               |
  90                         _REG_SHIFT(db->common.adf4350_regs_divider_select, 20)     |
  91                         _REG_SHIFT(db->common.adf4350_regs_8_bit_band_select_clock_divider_value, 12) |
  92                         _REG_SHIFT(adf4350_regs_vco_power_down, 11)                |
  93                         _REG_SHIFT(adf4350_regs_mtld, 10)                          |
  94                         _REG_SHIFT(adf4350_regs_aux_output_select, 9)              |
  95                         _REG_SHIFT(adf4350_regs_aux_output_enable, 8)              |
  96                         _REG_SHIFT(adf4350_regs_aux_output_power, 6)               |
  97                         _REG_SHIFT(adf4350_regs_rf_output_enable, 5)               |
  98                         _REG_SHIFT(adf4350_regs_output_power, 3)); break;
  99                 case 5: data = (
 100                         _REG_SHIFT(adf4350_regs_ld_pin_mode, 22)); break;
 101                 default: return;
 102         }
 103         /* write the data out to spi */
 104         adf4350_write(addr, data, dbb);
 105 }