2 mcs51 specific general functions.
4 Note that mlh prepended _mcs51_ on the static functions. Makes
5 it easier to set a breakpoint using the debugger.
11 #include "../SDCCutil.h"
13 static char _defaultRules[] =
18 /* list of key words used by msc51 */
19 static char *_mcs51_keywords[] =
53 void mcs51_assignRegisters (ebbIndex *);
55 static int regParmFlg = 0; /* determine if we can register a parameter */
60 asm_addTree (&asm_asxxxx_mapping);
64 _mcs51_reset_regparm (void)
70 _mcs51_regparm (sym_link * l)
72 if (IS_SPEC(l) && (SPEC_NOUN(l) == V_BIT))
74 if (options.parms_in_bank1 == 0) {
75 /* simple can pass only the first parameter in a register */
82 int size = getSize(l);
85 /* first one goes the usual way to DPTR */
86 if (regParmFlg == 0) {
90 /* second one onwards goes to RB1_0 thru RB1_7 */
91 remain = regParmFlg - 4;
92 if (size > (8 - remain)) {
97 return regParmFlg - size + 1;
102 _mcs51_parseOptions (int *pargc, char **argv, int *i)
104 /* TODO: allow port-specific command line options to specify
105 * segment names here.
111 _mcs51_finaliseOptions (void)
113 if (options.noXinitOpt) {
117 if (options.model == MODEL_LARGE) {
118 port->mem.default_local_map = xdata;
119 port->mem.default_globl_map = xdata;
123 port->mem.default_local_map = data;
124 port->mem.default_globl_map = data;
127 if (options.parms_in_bank1) {
128 addSet(&preArgvSet, Safe_strdup("-DSDCC_PARMS_IN_BANK1"));
133 _mcs51_setDefaultOptions (void)
138 _mcs51_getRegName (struct regs *reg)
146 _mcs51_genAssemblerPreamble (FILE * of)
148 if (options.parms_in_bank1) {
150 for (i=0; i < 8 ; i++ )
151 fprintf (of,"b1_%d = 0x%x \n",i,8+i);
155 /* Generate interrupt vector table. */
157 _mcs51_genIVT (FILE * of, symbol ** interrupts, int maxInterrupts)
161 fprintf (of, "\tljmp\t__sdcc_gsinit_startup\n");
163 /* now for the other interrupts */
164 for (i = 0; i < maxInterrupts; i++)
168 fprintf (of, "\tljmp\t%s\n", interrupts[i]->rname);
169 if ( i != maxInterrupts - 1 )
170 fprintf (of, "\t.ds\t5\n");
174 fprintf (of, "\treti\n");
175 if ( i != maxInterrupts - 1 )
176 fprintf (of, "\t.ds\t7\n");
183 _mcs51_genExtraAreas(FILE *of, bool hasMain)
185 tfprintf (of, "\t!area\n", HOME_NAME);
186 tfprintf (of, "\t!area\n", "GSINIT0 (CODE)");
187 tfprintf (of, "\t!area\n", "GSINIT1 (CODE)");
188 tfprintf (of, "\t!area\n", "GSINIT2 (CODE)");
189 tfprintf (of, "\t!area\n", "GSINIT3 (CODE)");
190 tfprintf (of, "\t!area\n", "GSINIT4 (CODE)");
191 tfprintf (of, "\t!area\n", "GSINIT5 (CODE)");
192 tfprintf (of, "\t!area\n", STATIC_NAME);
193 tfprintf (of, "\t!area\n", port->mem.post_static_name);
194 tfprintf (of, "\t!area\n", CODE_NAME);
198 _mcs51_genInitStartup (FILE *of)
200 tfprintf (of, "\t!global\n", "__sdcc_gsinit_startup");
201 tfprintf (of, "\t!global\n", "__sdcc_program_startup");
202 tfprintf (of, "\t!global\n", "__start__stack");
204 if (options.useXstack)
206 tfprintf (of, "\t!global\n", "__sdcc_init_xstack");
207 tfprintf (of, "\t!global\n", "__start__xstack");
210 // if the port can copy the XINIT segment to XISEG
216 if (!getenv("SDCC_NOGENRAMCLEAR"))
217 tfprintf (of, "\t!global\n", "__mcs51_genRAMCLEAR");
221 /* Generate code to copy XINIT to XISEG */
222 static void _mcs51_genXINIT (FILE * of) {
223 tfprintf (of, "\t!global\n", "__mcs51_genXINIT");
225 if (!getenv("SDCC_NOGENRAMCLEAR"))
226 tfprintf (of, "\t!global\n", "__mcs51_genXRAMCLEAR");
230 /* Do CSE estimation */
231 static bool cseCostEstimation (iCode *ic, iCode *pdic)
233 operand *result = IC_RESULT(ic);
234 sym_link *result_type = operandType(result);
236 /* if it is a pointer then return ok for now */
237 if (IC_RESULT(ic) && IS_PTR(result_type)) return 1;
239 /* if bitwise | add & subtract then no since mcs51 is pretty good at it
240 so we will cse only if they are local (i.e. both ic & pdic belong to
241 the same basic block */
242 if (IS_BITWISE_OP(ic) || ic->op == '+' || ic->op == '-') {
243 /* then if they are the same Basic block then ok */
244 if (ic->eBBlockNum == pdic->eBBlockNum) return 1;
248 /* for others it is cheaper to do the cse */
252 /* Indicate which extended bit operations this port supports */
254 hasExtBitOp (int op, int size)
259 || (op == SWAP && size <= 2)
266 /* Indicate the expense of an access to an output storage class */
268 oclsExpense (struct memmap *oclass)
270 if (IN_FARSPACE(oclass))
279 instructionSize(char *inst, char *op1, char *op2)
281 #define ISINST(s) (strncmp(inst, (s), sizeof(s)-1) == 0)
282 #define IS_A(s) (*(s) == 'a' && *(s+1) == '\0')
283 #define IS_C(s) (*(s) == 'c' && *(s+1) == '\0')
284 #define IS_Rn(s) (*(s) == 'r' && *(s+1) >= '0' && *(s+1) <= '7')
285 #define IS_atRi(s) (*(s) == '@' && *(s+1) == 'r')
287 /* Based on the current (2003-08-22) code generation for the
288 small library, the top instruction probability is:
299 /* mov, push, & pop are the 69% of the cases. Check them first! */
302 if (*(inst+3)=='x') return 1; /* movx */
303 if (*(inst+3)=='c') return 1; /* movc */
304 if (IS_C (op1) || IS_C (op2)) return 2;
307 if (IS_Rn (op2) || IS_atRi (op2)) return 1;
310 if (IS_Rn(op1) || IS_atRi(op1))
312 if (IS_A(op2)) return 1;
315 if (strcmp (op1, "dptr") == 0) return 3;
316 if (IS_A (op2) || IS_Rn (op2) || IS_atRi (op2)) return 2;
320 if (ISINST ("push")) return 2;
321 if (ISINST ("pop")) return 2;
323 if (ISINST ("lcall")) return 3;
324 if (ISINST ("ret")) return 1;
325 if (ISINST ("ljmp")) return 3;
326 if (ISINST ("sjmp")) return 2;
327 if (ISINST ("rlc")) return 1;
328 if (ISINST ("rrc")) return 1;
329 if (ISINST ("rl")) return 1;
330 if (ISINST ("rr")) return 1;
331 if (ISINST ("swap")) return 1;
332 if (ISINST ("jc")) return 2;
333 if (ISINST ("jnc")) return 2;
334 if (ISINST ("jb")) return 3;
335 if (ISINST ("jnb")) return 3;
336 if (ISINST ("jbc")) return 3;
337 if (ISINST ("jmp")) return 1; // always jmp @a+dptr
338 if (ISINST ("jz")) return 2;
339 if (ISINST ("jnz")) return 2;
340 if (ISINST ("cjne")) return 3;
341 if (ISINST ("mul")) return 1;
342 if (ISINST ("div")) return 1;
343 if (ISINST ("da")) return 1;
344 if (ISINST ("xchd")) return 1;
345 if (ISINST ("reti")) return 1;
346 if (ISINST ("nop")) return 1;
347 if (ISINST ("acall")) return 2;
348 if (ISINST ("ajmp")) return 2;
351 if (ISINST ("add") || ISINST ("addc") || ISINST ("subb") || ISINST ("xch"))
353 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
356 if (ISINST ("inc") || ISINST ("dec"))
358 if (IS_A(op1) || IS_Rn(op1) || IS_atRi(op1)) return 1;
359 if (strcmp(op1, "dptr") == 0) return 1;
362 if (ISINST ("anl") || ISINST ("orl") || ISINST ("xrl"))
364 if (IS_C(op1)) return 2;
367 if (IS_Rn(op2) || IS_atRi(op2)) return 1;
372 if (IS_A(op2)) return 2;
376 if (ISINST ("clr") || ISINST ("setb") || ISINST ("cpl"))
378 if (IS_A(op1) || IS_C(op1)) return 1;
383 if (IS_Rn(op1)) return 2;
387 /* If the instruction is unrecognized, we shouldn't try to optimize. */
388 /* Return a large value to discourage optimization. */
393 newAsmLineNode (void)
397 aln = Safe_alloc ( sizeof (asmLineNode));
399 aln->regsRead = NULL;
400 aln->regsWritten = NULL;
406 typedef struct mcs51operanddata
414 static mcs51operanddata mcs51operandDataTable[] =
417 {"ab", A_IDX, B_IDX},
431 {"dph", DPH_IDX, -1},
432 {"dpl", DPL_IDX, -1},
433 {"dptr", DPL_IDX, DPH_IDX},
438 {"psw", CND_IDX, -1},
450 mcs51operandCompare (const void *key, const void *member)
452 return strcmp((const char *)key, ((mcs51operanddata *)member)->name);
456 updateOpRW (asmLineNode *aln, char *op, char *optype)
458 mcs51operanddata *opdat;
461 dot = strchr(op, '.');
465 opdat = bsearch (op, mcs51operandDataTable,
466 sizeof(mcs51operandDataTable)/sizeof(mcs51operanddata),
467 sizeof(mcs51operanddata), mcs51operandCompare);
469 if (opdat && strchr(optype,'r'))
471 if (opdat->regIdx1 >= 0)
472 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx1);
473 if (opdat->regIdx2 >= 0)
474 aln->regsRead = bitVectSetBit (aln->regsRead, opdat->regIdx2);
476 if (opdat && strchr(optype,'w'))
478 if (opdat->regIdx1 >= 0)
479 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx1);
480 if (opdat->regIdx2 >= 0)
481 aln->regsWritten = bitVectSetBit (aln->regsWritten, opdat->regIdx2);
485 if (!strcmp(op, "@r0"))
486 aln->regsRead = bitVectSetBit (aln->regsRead, R0_IDX);
487 if (!strcmp(op, "@r1"))
488 aln->regsRead = bitVectSetBit (aln->regsRead, R1_IDX);
489 if (strstr(op, "dptr"))
491 aln->regsRead = bitVectSetBit (aln->regsRead, DPL_IDX);
492 aln->regsRead = bitVectSetBit (aln->regsRead, DPH_IDX);
494 if (strstr(op, "a+"))
495 aln->regsRead = bitVectSetBit (aln->regsRead, A_IDX);
499 typedef struct mcs51opcodedata
509 static mcs51opcodedata mcs51opcodeDataTable[] =
511 {"acall","j", "", "", ""},
512 {"add", "", "w", "rw", "r"},
513 {"addc", "", "rw", "rw", "r"},
514 {"ajmp", "j", "", "", ""},
515 {"anl", "", "", "rw", "r"},
516 {"cjne", "j", "w", "r", "r"},
517 {"clr", "", "", "w", ""},
518 {"cpl", "", "", "rw", ""},
519 {"da", "", "rw", "rw", ""},
520 {"dec", "", "", "rw", ""},
521 {"div", "", "w", "rw", ""},
522 {"djnz", "j", "", "rw", ""},
523 {"inc", "", "", "rw", ""},
524 {"jb", "j", "", "r", ""},
525 {"jbc", "j", "", "rw", ""},
526 {"jc", "j", "", "", ""},
527 {"jmp", "j", "", "", ""},
528 {"jnb", "j", "", "r", ""},
529 {"jnc", "j", "", "", ""},
530 {"jnz", "j", "", "", ""},
531 {"jz", "j", "", "", ""},
532 {"lcall","j", "", "", ""},
533 {"ljmp", "j", "", "", ""},
534 {"mov", "", "", "w", "r"},
535 {"movc", "", "", "w", "r"},
536 {"movx", "", "", "w", "r"},
537 {"mul", "", "w", "rw", ""},
538 {"nop", "", "", "", ""},
539 {"orl", "", "", "rw", "r"},
540 {"pop", "", "", "w", ""},
541 {"push", "", "", "r", ""},
542 {"ret", "j", "", "", ""},
543 {"reti", "j", "", "", ""},
544 {"rl", "", "", "rw", ""},
545 {"rlc", "", "rw", "rw", ""},
546 {"rr", "", "", "rw", ""},
547 {"rrc", "", "rw", "rw", ""},
548 {"setb", "", "", "w", ""},
549 {"sjmp", "j", "", "", ""},
550 {"subb", "", "rw", "rw", "r"},
551 {"swap", "", "", "rw", ""},
552 {"xch", "", "", "rw", "rw"},
553 {"xchd", "", "", "rw", "rw"},
554 {"xrl", "", "", "rw", "r"},
558 mcs51opcodeCompare (const void *key, const void *member)
560 return strcmp((const char *)key, ((mcs51opcodedata *)member)->name);
564 asmLineNodeFromLineNode (lineNode *ln)
566 asmLineNode *aln = newAsmLineNode();
567 char *op, op1[256], op2[256];
571 mcs51opcodedata *opdat;
575 while (*p && isspace(*p)) p++;
576 for (op = inst, opsize=1; *p; p++)
578 if (isspace(*p) || *p == ';' || *p == ':' || *p == '=')
581 if (opsize < sizeof(inst))
582 *op++ = tolower(*p), opsize++;
586 if (*p == ';' || *p == ':' || *p == '=')
589 while (*p && isspace(*p)) p++;
593 for (op = op1, opsize=1; *p && *p != ','; p++)
595 if (!isspace(*p) && opsize < sizeof(op1))
596 *op++ = tolower(*p), opsize++;
601 for (op = op2, opsize=1; *p && *p != ','; p++)
603 if (!isspace(*p) && opsize < sizeof(op2))
604 *op++ = tolower(*p), opsize++;
608 aln->size = instructionSize(inst, op1, op2);
610 aln->regsRead = newBitVect (END_IDX);
611 aln->regsWritten = newBitVect (END_IDX);
613 opdat = bsearch (inst, mcs51opcodeDataTable,
614 sizeof(mcs51opcodeDataTable)/sizeof(mcs51opcodedata),
615 sizeof(mcs51opcodedata), mcs51opcodeCompare);
619 updateOpRW (aln, op1, opdat->op1type);
620 updateOpRW (aln, op2, opdat->op2type);
621 if (strchr(opdat->pswtype,'r'))
622 aln->regsRead = bitVectSetBit (aln->regsRead, CND_IDX);
623 if (strchr(opdat->pswtype,'w'))
624 aln->regsWritten = bitVectSetBit (aln->regsWritten, CND_IDX);
631 getInstructionSize (lineNode *line)
634 line->aln = asmLineNodeFromLineNode (line);
636 return line->aln->size;
640 getRegsRead (lineNode *line)
643 line->aln = asmLineNodeFromLineNode (line);
645 return line->aln->regsRead;
649 getRegsWritten (lineNode *line)
652 line->aln = asmLineNodeFromLineNode (line);
654 return line->aln->regsWritten;
658 /** $1 is always the basename.
659 $2 is always the output file.
661 $l is the list of extra options that should be there somewhere...
662 MUST be terminated with a NULL.
664 static const char *_linkCmd[] =
666 "aslink", "-nf", "\"$1\"", NULL
669 /* $3 is replaced by assembler.debug_opts resp. port->assembler.plain_opts */
670 static const char *_asmCmd[] =
672 "asx8051", "$l", "$3", "\"$1.asm\"", NULL
680 "MCU 8051", /* Target name */
681 NULL, /* Processor name */
684 TRUE, /* Emit glue around main */
685 MODEL_SMALL | MODEL_LARGE,
691 "-plosgffc", /* Options with debug */
692 "-plosgff", /* Options without debug */
695 NULL /* no do_assemble function */
711 /* Sizes: char, short, int, long, ptr, fptr, gptr, bit, float, max */
712 1, 2, 2, 4, 1, 2, 3, 1, 4, 4
715 "XSTK (PAG,XDATA)", // xstack_name
716 "STACK (DATA)", // istack_name
717 "CSEG (CODE)", // code_name
718 "DSEG (DATA)", // data_name
719 "ISEG (DATA)", // idata_name
720 "PSEG (PAG,XDATA)", // pdata_name
721 "XSEG (XDATA)", // xdata_name
722 "BSEG (BIT)", // bit_name
723 "RSEG (DATA)", // reg_name
724 "GSINIT (CODE)", // static_name
725 "OSEG (OVR,DATA)", // overlay_name
726 "GSFINAL (CODE)", // post_static_name
727 "HOME (CODE)", // home_name
728 "XISEG (XDATA)", // xidata_name - initialized xdata initialized xdata
729 "XINIT (CODE)", // xinit_name - a code copy of xiseg
730 "CONST (CODE)", // const_name - const data (code or not)
735 { _mcs51_genExtraAreas, NULL },
737 +1, /* direction (+1 = stack grows up) */
738 0, /* bank_overhead (switch between register banks) */
739 4, /* isr_overhead */
740 1, /* call_overhead (2 for return address - 1 for pre-incrementing push */
741 1, /* reent_overhead */
742 0 /* banked_overhead (switch between code banks) */
745 /* mcs51 has an 8 bit mul */
749 mcs51_emitDebuggerSymbol
753 2, /* sizeofElement */
754 {6,9,15}, /* sizeofMatchJump[] */
755 {9,18,36}, /* sizeofRangeCompare[] */
756 4, /* sizeofSubtract */
757 6, /* sizeofDispatch */
764 _mcs51_finaliseOptions,
765 _mcs51_setDefaultOptions,
766 mcs51_assignRegisters,
769 _mcs51_genAssemblerPreamble,
770 NULL, /* no genAssemblerEnd */
773 _mcs51_genInitStartup,
774 _mcs51_reset_regparm,
779 hasExtBitOp, /* hasExtBitOp */
780 oclsExpense, /* oclsExpense */
782 TRUE, /* little endian */
785 1, /* transform <= to ! > */
786 1, /* transform >= to ! < */
787 1, /* transform != to !(a == b) */
789 FALSE, /* No array initializer support. */
791 NULL, /* no builtin functions */
792 GPOINTER, /* treat unqualified pointers as "generic" pointers */
793 1, /* reset labelKey to 1 */
794 1, /* globals & local static allowed */