2 # Copyright 2004,2005,2007 Free Software Foundation, Inc.
4 # This file is part of GNU Radio
6 # GNU Radio is free software; you can redistribute it and/or modify
7 # it under the terms of the GNU General Public License as published by
8 # the Free Software Foundation; either version 3, or (at your option)
11 # GNU Radio is distributed in the hope that it will be useful,
12 # but WITHOUT ANY WARRANTY; without even the implied warranty of
13 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 # GNU General Public License for more details.
16 # You should have received a copy of the GNU General Public License
17 # along with GNU Radio; see the file COPYING. If not, write to
18 # the Free Software Foundation, Inc., 51 Franklin Street,
19 # Boston, MA 02110-1301, USA.
24 from usrpm import usrp_prims
25 from usrpm import usrp_dbid
26 from gnuradio import usrp1 # usrp Rev 1 and later
27 from gnuradio import gru
28 from usrpm.usrp_fpga_regs import *
31 FPGA_MODE_NORMAL = usrp1.FPGA_MODE_NORMAL
32 FPGA_MODE_LOOPBACK = usrp1.FPGA_MODE_LOOPBACK
33 FPGA_MODE_COUNTING = usrp1.FPGA_MODE_COUNTING
35 SPI_FMT_xSB_MASK = usrp1.SPI_FMT_xSB_MASK
36 SPI_FMT_LSB = usrp1.SPI_FMT_LSB
37 SPI_FMT_MSB = usrp1.SPI_FMT_MSB
38 SPI_FMT_HDR_MASK = usrp1.SPI_FMT_HDR_MASK
39 SPI_FMT_HDR_0 = usrp1.SPI_FMT_HDR_0
40 SPI_FMT_HDR_1 = usrp1.SPI_FMT_HDR_1
41 SPI_FMT_HDR_2 = usrp1.SPI_FMT_HDR_2
43 SPI_ENABLE_FPGA = usrp1.SPI_ENABLE_FPGA
44 SPI_ENABLE_CODEC_A = usrp1.SPI_ENABLE_CODEC_A
45 SPI_ENABLE_CODEC_B = usrp1.SPI_ENABLE_CODEC_B
46 SPI_ENABLE_reserved = usrp1.SPI_ENABLE_reserved
47 SPI_ENABLE_TX_A = usrp1.SPI_ENABLE_TX_A
48 SPI_ENABLE_RX_A = usrp1.SPI_ENABLE_RX_A
49 SPI_ENABLE_TX_B = usrp1.SPI_ENABLE_TX_B
50 SPI_ENABLE_RX_B = usrp1.SPI_ENABLE_RX_B
53 # Import all the daughterboard classes we know about.
54 # This hooks them into the auto-instantiation framework.
56 import db_instantiator
68 def _look_for_usrp(which):
70 Try to open the specified usrp.
72 @param which: int >= 0 specifying which USRP to open
75 @return: Returns version number, or raises RuntimeError
78 d = usrp_prims.usrp_find_device(which)
80 raise RuntimeError, "Unable to find USRP #%d" % (which,)
82 return usrp_prims.usrp_hw_rev(d)
85 def _ensure_rev2(which):
86 v = _look_for_usrp(which)
88 raise RuntimeError, "Sorry, unsupported USRP revision (rev=%d)" % (v,)
91 class tune_result(object):
93 Container for intermediate tuning information.
95 def __init__(self, baseband_freq, dxc_freq, residual_freq, inverted):
96 self.baseband_freq = baseband_freq
97 self.dxc_freq = dxc_freq
98 self.residual_freq = residual_freq
99 self.inverted = inverted
102 def tune(u, chan, subdev, target_freq):
104 Set the center frequency we're interested in.
106 @param u: instance of usrp.source_* or usrp.sink_*
107 @param chan: DDC/DUC channel
109 @param subdev: daughterboard subdevice
110 @param target_freq: frequency in Hz
111 @returns False if failure else tune_result
113 Tuning is a two step process. First we ask the front-end to
114 tune as close to the desired frequency as it can. Then we use
115 the result of that operation and our target_frequency to
116 determine the value for the digital down converter.
119 # Does this usrp instance do Tx or Rx?
123 except AttributeError:
126 ok, baseband_freq = subdev.set_freq(target_freq)
127 dxc_freq, inverted = calc_dxc_freq(target_freq, baseband_freq, u.converter_rate())
129 # If the spectrum is inverted, and the daughterboard doesn't do
130 # quadrature downconversion, we can fix the inversion by flipping the
131 # sign of the dxc_freq... (This only happens using the basic_rx board)
133 if subdev.spectrum_inverted():
134 inverted = not(inverted)
136 if inverted and not(subdev.is_quadrature()):
138 inverted = not(inverted)
141 ok = ok and u.set_rx_freq(chan, dxc_freq)
144 ok = ok and u.set_tx_freq(chan, dxc_freq)
149 # residual_freq is the offset left over because of dxc tuning step size
151 residual_freq = dxc_freq - u.rx_freq(chan)
153 residual_freq = dxc_freq - u.tx_freq(chan)
155 return tune_result(baseband_freq, dxc_freq, residual_freq, inverted)
158 # ------------------------------------------------------------------------
159 # Build subclasses of raw usrp1.* class that add the db attribute
160 # by automatically instantiating the appropriate daughterboard classes.
161 # [Also provides keyword args.]
162 # ------------------------------------------------------------------------
164 class usrp_common(object):
166 # read capability register
167 r = self._u._read_fpga_reg(FR_RB_CAPS)
170 if r == 0xaa55ff77: # value of this reg prior to being defined as cap reg
171 r = ((2 << bmFR_RB_CAPS_NDUC_SHIFT)
172 | (2 << bmFR_RB_CAPS_NDDC_SHIFT)
173 | bmFR_RB_CAPS_RX_HAS_HALFBAND)
177 print "FR_RB_CAPS = %#08x" % (self._fpga_caps,)
178 print "has_rx_halfband =", self.has_rx_halfband()
179 print "nDDCs =", self.nddc()
180 print "has_tx_halfband =", self.has_tx_halfband()
181 print "nDUCs =", self.nduc()
183 def __getattr__(self, name):
184 return getattr(self._u, name)
186 def tune(self, chan, subdev, target_freq):
187 return tune(self, chan, subdev, target_freq)
189 def has_rx_halfband(self):
190 return self._fpga_caps & bmFR_RB_CAPS_RX_HAS_HALFBAND != 0
192 def has_tx_halfband(self):
193 return self._fpga_caps & bmFR_RB_CAPS_TX_HAS_HALFBAND != 0
197 Number of Digital Down Converters implemented in FPGA
199 return (self._fpga_caps & bmFR_RB_CAPS_NDDC_MASK) >> bmFR_RB_CAPS_NDDC_SHIFT
203 Number of Digital Up Converters implemented in FPGA
205 return (self._fpga_caps & bmFR_RB_CAPS_NDUC_MASK) >> bmFR_RB_CAPS_NDUC_SHIFT
208 class sink_c(usrp_common):
209 def __init__(self, which=0, interp_rate=128, nchan=1, mux=0x98,
210 fusb_block_size=0, fusb_nblocks=0,
211 fpga_filename="", firmware_filename=""):
213 self._u = usrp1.sink_c(which, interp_rate, nchan, mux,
214 fusb_block_size, fusb_nblocks,
215 fpga_filename, firmware_filename)
216 # Add the db attribute, which contains a 2-tuple of tuples of daughterboard classes
217 self.db = (db_instantiator.instantiate(self._u, 0),
218 db_instantiator.instantiate(self._u, 1))
219 usrp_common.__init__(self)
222 self.db = None # will fire d'board destructors
223 self._u = None # will fire usrp1.* destructor
226 class sink_s(usrp_common):
227 def __init__(self, which=0, interp_rate=128, nchan=1, mux=0x98,
228 fusb_block_size=0, fusb_nblocks=0,
229 fpga_filename="", firmware_filename=""):
231 self._u = usrp1.sink_s(which, interp_rate, nchan, mux,
232 fusb_block_size, fusb_nblocks,
233 fpga_filename, firmware_filename)
234 # Add the db attribute, which contains a 2-tuple of tuples of daughterboard classes
235 self.db = (db_instantiator.instantiate(self._u, 0),
236 db_instantiator.instantiate(self._u, 1))
237 usrp_common.__init__(self)
240 self.db = None # will fire d'board destructors
241 self._u = None # will fire usrp1.* destructor
244 class source_c(usrp_common):
245 def __init__(self, which=0, decim_rate=64, nchan=1, mux=0x32103210, mode=0,
246 fusb_block_size=0, fusb_nblocks=0,
247 fpga_filename="", firmware_filename=""):
249 self._u = usrp1.source_c(which, decim_rate, nchan, mux, mode,
250 fusb_block_size, fusb_nblocks,
251 fpga_filename, firmware_filename)
252 # Add the db attribute, which contains a 2-tuple of tuples of daughterboard classes
253 self.db = (db_instantiator.instantiate(self._u, 0),
254 db_instantiator.instantiate(self._u, 1))
255 usrp_common.__init__(self)
258 self.db = None # will fire d'board destructors
259 self._u = None # will fire usrp1.* destructor
262 class source_s(usrp_common):
263 def __init__(self, which=0, decim_rate=64, nchan=1, mux=0x32103210, mode=0,
264 fusb_block_size=0, fusb_nblocks=0,
265 fpga_filename="", firmware_filename=""):
267 self._u = usrp1.source_s(which, decim_rate, nchan, mux, mode,
268 fusb_block_size, fusb_nblocks,
269 fpga_filename, firmware_filename)
270 # Add the db attribute, which contains a 2-tuple of tuples of daughterboard classes
271 self.db = (db_instantiator.instantiate(self._u, 0),
272 db_instantiator.instantiate(self._u, 1))
273 usrp_common.__init__(self)
276 self.db = None # will fire d'board destructors
277 self._u = None # will fire usrp1.* destructor
280 # ------------------------------------------------------------------------
282 # ------------------------------------------------------------------------
284 def determine_rx_mux_value(u, subdev_spec):
286 Determine appropriate Rx mux value as a function of the subdevice choosen and the
287 characteristics of the respective daughterboard.
289 @param u: instance of USRP source
290 @param subdev_spec: return value from subdev option parser.
291 @type subdev_spec: (side, subdev), where side is 0 or 1 and subdev is 0 or 1
292 @returns: the Rx mux value
294 # Figure out which A/D's to connect to the DDC.
296 # Each daughterboard consists of 1 or 2 subdevices. (At this time,
297 # all but the Basic Rx have a single subdevice. The Basic Rx
298 # has two independent channels, treated as separate subdevices).
299 # subdevice 0 of a daughterboard may use 1 or 2 A/D's. We determine this
300 # by checking the is_quadrature() method. If subdevice 0 uses only a single
301 # A/D, it's possible that the daughterboard has a second subdevice, subdevice 1,
302 # and it uses the second A/D.
304 # If the card uses only a single A/D, we wire a zero into the DDC Q input.
306 # (side, 0) says connect only the A/D's used by subdevice 0 to the DDC.
307 # (side, 1) says connect only the A/D's used by subdevice 1 to the DDC.
310 side = subdev_spec[0] # side A = 0, side B = 1
312 if not(side in (0, 1)):
313 raise ValueError, "Invalid subdev_spec: %r:" % (subdev_spec,)
315 db = u.db[side] # This is a tuple of length 1 or 2 containing the subdevice
316 # classes for the selected side.
318 # compute bitmasks of used A/D's
320 if db[0].is_quadrature():
321 subdev0_uses = 0x3 # uses A/D 0 and 1
323 subdev0_uses = 0x1 # uses A/D 0 only
326 subdev1_uses = 0x2 # uses A/D 1 only
328 subdev1_uses = 0x0 # uses no A/D (doesn't exist)
330 if subdev_spec[1] == 0:
332 elif subdev_spec[1] == 1:
335 raise ValueError, "Invalid subdev_spec: %r: " % (subdev_spec,)
338 raise RuntimeError, "Daughterboard doesn't have a subdevice 1: %r: " % (subdev_spec,)
340 swap_iq = db[0].i_and_q_swapped()
343 # (side, uses, swap_iq) : mux_val
344 (0, 0x1, False) : 0xf0f0f0f0,
345 (0, 0x2, False) : 0xf0f0f0f1,
346 (0, 0x3, False) : 0x00000010,
347 (0, 0x3, True) : 0x00000001,
348 (1, 0x1, False) : 0xf0f0f0f2,
349 (1, 0x2, False) : 0xf0f0f0f3,
350 (1, 0x3, False) : 0x00000032,
351 (1, 0x3, True) : 0x00000023
354 return gru.hexint(truth_table[(side, uses, swap_iq)])
357 def determine_tx_mux_value(u, subdev_spec):
359 Determine appropriate Tx mux value as a function of the subdevice choosen.
361 @param u: instance of USRP source
362 @param subdev_spec: return value from subdev option parser.
363 @type subdev_spec: (side, subdev), where side is 0 or 1 and subdev is 0
364 @returns: the Rx mux value
366 # This is simpler than the rx case. Either you want to talk
367 # to side A or side B. If you want to talk to both sides at once,
368 # determine the value manually.
370 side = subdev_spec[0] # side A = 0, side B = 1
371 if not(side in (0, 1)):
372 raise ValueError, "Invalid subdev_spec: %r:" % (subdev_spec,)
376 if(db[0].i_and_q_swapped()):
377 return gru.hexint([0x0089, 0x8900][side])
379 return gru.hexint([0x0098, 0x9800][side])
382 def selected_subdev(u, subdev_spec):
384 Return the user specified daughterboard subdevice.
386 @param u: an instance of usrp.source_* or usrp.sink_*
387 @param subdev_spec: return value from subdev option parser.
388 @type subdev_spec: (side, subdev), where side is 0 or 1 and subdev is 0 or 1
389 @returns: an weakref to an instance derived from db_base
391 side, subdev = subdev_spec
392 # Note: This allows db to go out of scope at the right time
393 return weakref.proxy(u.db[side][subdev])
396 def calc_dxc_freq(target_freq, baseband_freq, fs):
398 Calculate the frequency to use for setting the digital up or down converter.
400 @param target_freq: desired RF frequency (Hz)
401 @type target_freq: number
402 @param baseband_freq: the RF frequency that corresponds to DC in the IF.
403 @type baseband_freq: number
404 @param fs: converter sample rate
407 @returns: 2-tuple (ddc_freq, inverted) where ddc_freq is the value
408 for the ddc and inverted is True if we're operating in an inverted
412 delta = target_freq - baseband_freq
418 return (-delta, False) # non-inverted region
420 return (delta - fs, True) # inverted region
425 return (-delta, False) # non-inverted region
427 return (delta + fs, True) # inverted region
430 # ------------------------------------------------------------------------
432 # ------------------------------------------------------------------------
434 def pick_tx_subdevice(u):
436 The user didn't specify a tx subdevice on the command line.
437 Try for one of these, in order: FLEX_400, FLEX_900, FLEX_1200, FLEX_2400,
438 BASIC_TX, whatever's on side A.
440 @return a subdev_spec
442 return pick_subdev(u, (usrp_dbid.FLEX_400_TX,
443 usrp_dbid.FLEX_900_TX,
444 usrp_dbid.FLEX_1200_TX,
445 usrp_dbid.FLEX_2400_TX,
448 def pick_rx_subdevice(u):
450 The user didn't specify an rx subdevice on the command line.
451 Try for one of these, in order: FLEX_400, FLEX_900, FLEX_1200, FLEX_2400,
452 TV_RX, DBS_RX, BASIC_RX, whatever's on side A.
454 @return a subdev_spec
456 return pick_subdev(u, (usrp_dbid.FLEX_400_RX,
457 usrp_dbid.FLEX_900_RX,
458 usrp_dbid.FLEX_1200_RX,
459 usrp_dbid.FLEX_2400_RX,
461 usrp_dbid.TV_RX_REV_2,
463 usrp_dbid.DBS_RX_REV_2_1,
466 def pick_subdev(u, candidates):
468 @param u: usrp instance
469 @param candidates: list of dbids
470 @returns: subdev specification
472 db0 = u.db[0][0].dbid()
473 db1 = u.db[1][0].dbid()
475 if c == db0: return (0, 0)
476 if c == db1: return (1, 0)
481 raise RuntimeError, "No suitable daughterboard found!"