2 * pic18f2331.h - device specific declarations
4 * This file is part of the GNU PIC library for SDCC,
5 * originally devised by Vangelis Rokas <vrokas AT otenet.gr>
7 * It has been automatically generated by inc2h-pic16.pl,
8 * (c) 2007 by Raphael Neider <rneider AT web.de>
11 #ifndef __PIC18F2331_H__
12 #define __PIC18F2331_H__ 1
17 #define __CONFIG1H 0x300001
18 #define __CONFIG2L 0x300002
19 #define __CONFIG2H 0x300003
20 #define __CONFIG3L 0x300004
21 #define __CONFIG3H 0x300005
22 #define __CONFIG4L 0x300006
23 #define __CONFIG5L 0x300008
24 #define __CONFIG5H 0x300009
25 #define __CONFIG6L 0x30000A
26 #define __CONFIG6H 0x30000B
27 #define __CONFIG7L 0x30000C
28 #define __CONFIG7H 0x30000D
31 #define _OSC_LP_1H 0xF0 // LP
32 #define _OSC_XT_1H 0xF1 // XT
33 #define _OSC_HS_1H 0xF2 // HS
34 #define _OSC_RC2_1H 0xF3 // External RC, RA6 is CLKOUT
35 #define _OSC_EC_1H 0xF4 // EC, RA6 is CLKOUT
36 #define _OSC_ECIO_1H 0xF5 // EC, RA6 is I/O
37 #define _OSC_HSPLL_1H 0xF6 // HS-PLL Enabled
38 #define _OSC_RCIO_1H 0xF7 // External RC, RA6 is I/O
39 #define _OSC_IRCIO_1H 0xF8 // Internal RC, RA6 & RA7 are I/O
40 #define _OSC_IRC_1H 0xF9 // Internal RC, RA6 is CLKOUT, RA7 is I/O
41 #define _OSC_RC1_1H 0xFB // External RC, RA6 is CLKOUT
42 #define _OSC_RC_1H 0xFF // External RC, RA6 is CLKOUT
43 #define _FCMEN_OFF_1H 0xBF // Disabled
44 #define _FCMEN_ON_1H 0xFF // Enabled
45 #define _IESO_OFF_1H 0x7F // Disabled
46 #define _IESO_ON_1H 0xFF // Enabled
49 #define _PWRTEN_ON_2L 0xFE // Enabled
50 #define _PWRTEN_OFF_2L 0xFF // Disabled
51 #define _BOREN_OFF_2L 0xFD // Disabled
52 #define _BOREN_ON_2L 0xFF // Enabled
53 #define _BORV_45_2L 0xF3 // 4.5V
54 #define _BORV_42_2L 0xF7 // 4.2V
55 #define _BORV_27_2L 0xFB // 2.7V
56 #define _BORV_20_2L 0xFF // 2.0V
59 #define _WDTEN_OFF_2H 0xFE // Disabled
60 #define _WDTEN_ON_2H 0xFF // Enabled
61 #define _WINEN_ON_2H 0xDF // Enabled
62 #define _WINEN_OFF_2H 0xFF // Disabled
63 #define _WDPS_1_2H 0xE1 // 1:1
64 #define _WDPS_2_2H 0xE3 // 1:2
65 #define _WDPS_4_2H 0xE5 // 1:4
66 #define _WDPS_8_2H 0xE7 // 1:8
67 #define _WDPS_16_2H 0xE9 // 1:16
68 #define _WDPS_32_2H 0xEB // 1:32
69 #define _WDPS_64_2H 0xED // 1:64
70 #define _WDPS_128_2H 0xEF // 1:128
71 #define _WDPS_256_2H 0xF1 // 1:256
72 #define _WDPS_512_2H 0xF3 // 1:512
73 #define _WDPS_1024_2H 0xF5 // 1:1024
74 #define _WDPS_2048_2H 0xF7 // 1:2048
75 #define _WDPS_4096_2H 0xF9 // 1:4096
76 #define _WDPS_8192_2H 0xFB // 1:8192
77 #define _WDPS_16384_2H 0xFD // 1:16384
78 #define _WDPS_32768_2H 0xFF // 1:32768
81 #define _T1OSCMX_OFF_3L 0xDF // Active
82 #define _T1OSCMX_ON_3L 0xFF // Inactive
83 #define _HPOL_LOW_3L 0xEF // Active low
84 #define _HPOL_HIGH_3L 0xFF // Active high
85 #define _LPOL_LOW_3L 0xF7 // Active low
86 #define _LPOL_HIGH_3L 0xFF // Active high
87 #define _PWMPIN_ON_3L 0xFB // Enabled
88 #define _PWMPIN_OFF_3L 0xFF // Disabled
91 #define _MCLRE_OFF_3H 0x7F // Disabled
92 #define _MCLRE_ON_3H 0xFF // Enabled
95 #define _STVREN_OFF_4L 0xFE // Disabled
96 #define _STVREN_ON_4L 0xFF // Enabled
97 #define _LVP_OFF_4L 0xFB // Disabled
98 #define _LVP_ON_4L 0xFF // Enabled
99 #define _DEBUG_ON_4L 0x7F // Enabled
100 #define _DEBUG_OFF_4L 0xFF // Disabled
103 #define _CP0_ON_5L 0xFE // Enabled
104 #define _CP0_OFF_5L 0xFF // Disabled
105 #define _CP1_ON_5L 0xFD // Enabled
106 #define _CP1_OFF_5L 0xFF // Disabled
109 #define _CPB_ON_5H 0xBF // Enabled
110 #define _CPB_OFF_5H 0xFF // Disabled
111 #define _CPD_ON_5H 0x7F // Enabled
112 #define _CPD_OFF_5H 0xFF // Disabled
115 #define _WRT0_ON_6L 0xFE // Enabled
116 #define _WRT0_OFF_6L 0xFF // Disabled
117 #define _WRT1_ON_6L 0xFD // Enabled
118 #define _WRT1_OFF_6L 0xFF // Disabled
121 #define _WRTB_ON_6H 0xBF // Enabled
122 #define _WRTB_OFF_6H 0xFF // Disabled
123 #define _WRTC_ON_6H 0xDF // Enabled
124 #define _WRTC_OFF_6H 0xFF // Disabled
125 #define _WRTD_ON_6H 0x7F // Enabled
126 #define _WRTD_OFF_6H 0xFF // Disabled
129 #define _EBTR0_ON_7L 0xFE // Enabled
130 #define _EBTR0_OFF_7L 0xFF // Disabled
131 #define _EBTR1_ON_7L 0xFD // Enabled
132 #define _EBTR1_OFF_7L 0xFF // Disabled
135 #define _EBTRB_ON_7H 0xBF // Enabled
136 #define _EBTRB_OFF_7H 0xFF // Disabled
137 #define _DEVID1 0x3FFFFE
138 #define _DEVID2 0x3FFFFF
139 #define _IDLOC0 0x200000
140 #define _IDLOC1 0x200001
141 #define _IDLOC2 0x200002
142 #define _IDLOC3 0x200003
143 #define _IDLOC4 0x200004
144 #define _IDLOC5 0x200005
145 #define _IDLOC6 0x200006
146 #define _IDLOC7 0x200007
148 extern __sfr __at (0xF60) DFLTCON;
161 extern volatile __DFLTCONbits_t __at (0xF60) DFLTCONbits;
163 extern __sfr __at (0xF61) CAP3CON;
171 unsigned CAP3TMR : 1;
172 unsigned CAP3REN : 1;
176 extern volatile __CAP3CONbits_t __at (0xF61) CAP3CONbits;
178 extern __sfr __at (0xF62) CAP2CON;
186 unsigned CAP2TMR : 1;
187 unsigned CAP2REN : 1;
191 extern volatile __CAP2CONbits_t __at (0xF62) CAP2CONbits;
193 extern __sfr __at (0xF63) CAP1CON;
201 unsigned CAP1TMR : 1;
202 unsigned CAP1REN : 1;
206 extern volatile __CAP1CONbits_t __at (0xF63) CAP1CONbits;
208 extern __sfr __at (0xF64) CAP3BUFL;
210 extern __sfr __at (0xF64) MAXCNTL;
212 extern __sfr __at (0xF65) CAP3BUFH;
214 extern __sfr __at (0xF65) MAXCNTH;
216 extern __sfr __at (0xF66) CAP2BUFL;
218 extern __sfr __at (0xF66) POSCNTL;
220 extern __sfr __at (0xF67) CAP2BUFH;
222 extern __sfr __at (0xF67) POSCNTH;
224 extern __sfr __at (0xF68) CAP1BUFL;
226 extern __sfr __at (0xF68) VELRL;
228 extern __sfr __at (0xF69) CAP1BUFH;
230 extern __sfr __at (0xF69) VELRH;
232 extern __sfr __at (0xF6A) OVDCONS;
245 extern volatile __OVDCONSbits_t __at (0xF6A) OVDCONSbits;
247 extern __sfr __at (0xF6B) OVDCOND;
260 extern volatile __OVDCONDbits_t __at (0xF6B) OVDCONDbits;
262 extern __sfr __at (0xF6C) FLTCONFIG;
266 unsigned FLTAMOD : 1;
270 unsigned FLTBMOD : 1;
275 extern volatile __FLTCONFIGbits_t __at (0xF6C) FLTCONFIGbits;
277 extern __sfr __at (0xF6D) DTCON;
300 extern volatile __DTCONbits_t __at (0xF6D) DTCONbits;
302 extern __sfr __at (0xF6E) PWMCON1;
308 unsigned SEVTDIR : 1;
309 unsigned SEVOPS0 : 1;
310 unsigned SEVOPS1 : 1;
311 unsigned SEVOPS2 : 1;
312 unsigned SEVOPS3 : 1;
315 extern volatile __PWMCON1bits_t __at (0xF6E) PWMCON1bits;
317 extern __sfr __at (0xF6F) PWMCON0;
330 extern volatile __PWMCON0bits_t __at (0xF6F) PWMCON0bits;
332 extern __sfr __at (0xF70) SEVTCMPH;
334 extern __sfr __at (0xF71) SEVTCMPL;
336 extern __sfr __at (0xF72) PDC3H;
338 extern __sfr __at (0xF73) PDC3L;
340 extern __sfr __at (0xF74) PDC2H;
342 extern __sfr __at (0xF75) PDC2L;
344 extern __sfr __at (0xF76) PDC1H;
346 extern __sfr __at (0xF77) PDC1L;
348 extern __sfr __at (0xF78) PDC0H;
350 extern __sfr __at (0xF79) PDC0L;
352 extern __sfr __at (0xF7A) PTPERH;
354 extern __sfr __at (0xF7B) PTPERL;
356 extern __sfr __at (0xF7C) PTMRH;
358 extern __sfr __at (0xF7D) PTMRL;
360 extern __sfr __at (0xF7E) PTCON1;
373 extern volatile __PTCON1bits_t __at (0xF7E) PTCON1bits;
375 extern __sfr __at (0xF7F) PTCON0;
380 unsigned PTCKPS0 : 1;
381 unsigned PTCKPS1 : 1;
388 extern volatile __PTCON0bits_t __at (0xF7F) PTCON0bits;
390 extern __sfr __at (0xF80) PORTA;
423 extern volatile __PORTAbits_t __at (0xF80) PORTAbits;
425 extern __sfr __at (0xF81) PORTB;
438 extern volatile __PORTBbits_t __at (0xF81) PORTBbits;
440 extern __sfr __at (0xF82) PORTC;
465 unsigned NOT_FLTB : 1;
474 unsigned NOT_FLTA : 1;
493 extern volatile __PORTCbits_t __at (0xF82) PORTCbits;
495 extern __sfr __at (0xF84) PORTE;
508 extern volatile __PORTEbits_t __at (0xF84) PORTEbits;
510 extern __sfr __at (0xF87) TMR5L;
512 extern __sfr __at (0xF88) TMR5H;
514 extern __sfr __at (0xF89) LATA;
527 extern volatile __LATAbits_t __at (0xF89) LATAbits;
529 extern __sfr __at (0xF8A) LATB;
542 extern volatile __LATBbits_t __at (0xF8A) LATBbits;
544 extern __sfr __at (0xF8B) LATC;
557 extern volatile __LATCbits_t __at (0xF8B) LATCbits;
559 extern __sfr __at (0xF90) PR5L;
561 extern __sfr __at (0xF91) PR5H;
563 extern __sfr __at (0xF92) DDRA;
576 extern volatile __DDRAbits_t __at (0xF92) DDRAbits;
578 extern __sfr __at (0xF92) TRISA;
591 extern volatile __TRISAbits_t __at (0xF92) TRISAbits;
593 extern __sfr __at (0xF93) DDRB;
606 extern volatile __DDRBbits_t __at (0xF93) DDRBbits;
608 extern __sfr __at (0xF93) TRISB;
621 extern volatile __TRISBbits_t __at (0xF93) TRISBbits;
623 extern __sfr __at (0xF94) DDRC;
636 extern volatile __DDRCbits_t __at (0xF94) DDRCbits;
638 extern __sfr __at (0xF94) TRISC;
651 extern volatile __TRISCbits_t __at (0xF94) TRISCbits;
653 extern __sfr __at (0xF99) ADCHS;
676 extern volatile __ADCHSbits_t __at (0xF99) ADCHSbits;
678 extern __sfr __at (0xF9A) ADCON3;
691 extern volatile __ADCON3bits_t __at (0xF9A) ADCON3bits;
693 extern __sfr __at (0xF9B) OSCTUNE;
706 extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits;
708 extern __sfr __at (0xF9D) PIE1;
731 extern volatile __PIE1bits_t __at (0xF9D) PIE1bits;
733 extern __sfr __at (0xF9E) PIR1;
756 extern volatile __PIR1bits_t __at (0xF9E) PIR1bits;
758 extern __sfr __at (0xF9F) IPR1;
781 extern volatile __IPR1bits_t __at (0xF9F) IPR1bits;
783 extern __sfr __at (0xFA0) PIE2;
796 extern volatile __PIE2bits_t __at (0xFA0) PIE2bits;
798 extern __sfr __at (0xFA1) PIR2;
811 extern volatile __PIR2bits_t __at (0xFA1) PIR2bits;
813 extern __sfr __at (0xFA2) IPR2;
826 extern volatile __IPR2bits_t __at (0xFA2) IPR2bits;
828 extern __sfr __at (0xFA3) PIE3;
833 unsigned IC2QEIE : 1;
834 unsigned IC3DRIE : 1;
841 extern volatile __PIE3bits_t __at (0xFA3) PIE3bits;
843 extern __sfr __at (0xFA4) PIR3;
848 unsigned IC2QEIF : 1;
849 unsigned IC3DRIF : 1;
856 extern volatile __PIR3bits_t __at (0xFA4) PIR3bits;
858 extern __sfr __at (0xFA5) IPR3;
863 unsigned IC2QEIP : 1;
864 unsigned IC3DRIP : 1;
871 extern volatile __IPR3bits_t __at (0xFA5) IPR3bits;
873 extern __sfr __at (0xFA6) EECON1;
886 extern volatile __EECON1bits_t __at (0xFA6) EECON1bits;
888 extern __sfr __at (0xFA7) EECON2;
890 extern __sfr __at (0xFA8) EEDATA;
892 extern __sfr __at (0xFA9) EEADR;
894 extern __sfr __at (0xFAA) BAUDCON;
907 extern volatile __BAUDCONbits_t __at (0xFAA) BAUDCONbits;
909 extern __sfr __at (0xFAA) BAUDCTL;
922 extern volatile __BAUDCTLbits_t __at (0xFAA) BAUDCTLbits;
924 extern __sfr __at (0xFAB) RCSTA;
937 extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits;
939 extern __sfr __at (0xFAC) TXSTA;
952 extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits;
954 extern __sfr __at (0xFAD) TXREG;
956 extern __sfr __at (0xFAE) RCREG;
958 extern __sfr __at (0xFAF) SPBRG;
960 extern __sfr __at (0xFB0) SPBRGH;
962 extern __sfr __at (0xFB6) QEICON;
970 unsigned UP_DOWN : 1;
982 unsigned NOT_VELM : 1;
1000 unsigned NOT_DOWN : 1;
1005 extern volatile __QEICONbits_t __at (0xFB6) QEICONbits;
1007 extern __sfr __at (0xFB7) T5CON;
1010 unsigned TMR5ON : 1;
1011 unsigned TMR5CS : 1;
1012 unsigned T5SYNC : 1;
1022 unsigned NOT_T5SYNC : 1;
1026 unsigned NOT_RESEN : 1;
1030 extern volatile __T5CONbits_t __at (0xFB7) T5CONbits;
1032 extern __sfr __at (0xFB8) ANSEL0;
1045 extern volatile __ANSEL0bits_t __at (0xFB8) ANSEL0bits;
1047 extern __sfr __at (0xFBA) CCP2CON;
1050 unsigned CCP2M0 : 1;
1051 unsigned CCP2M1 : 1;
1052 unsigned CCP2M2 : 1;
1053 unsigned CCP2M3 : 1;
1070 extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits;
1072 extern __sfr __at (0xFBB) CCPR2;
1074 extern __sfr __at (0xFBB) CCPR2L;
1076 extern __sfr __at (0xFBC) CCPR2H;
1078 extern __sfr __at (0xFBD) CCP1CON;
1081 unsigned CCP1M0 : 1;
1082 unsigned CCP1M1 : 1;
1083 unsigned CCP1M2 : 1;
1084 unsigned CCP1M3 : 1;
1101 extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits;
1103 extern __sfr __at (0xFBE) CCPR1;
1105 extern __sfr __at (0xFBE) CCPR1L;
1107 extern __sfr __at (0xFBF) CCPR1H;
1109 extern __sfr __at (0xFC0) ADCON2;
1122 extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits;
1124 extern __sfr __at (0xFC1) ADCON1;
1127 unsigned ADPNT0 : 1;
1128 unsigned ADPNT1 : 1;
1129 unsigned BFOVFL : 1;
1131 unsigned FIFOEN : 1;
1139 unsigned FFOVFL : 1;
1147 extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits;
1149 extern __sfr __at (0xFC2) ADCON0;
1153 unsigned GO_DONE : 1;
1154 unsigned ACMOD0 : 1;
1155 unsigned ACMOD1 : 1;
1183 unsigned NOT_DONE : 1;
1192 extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits;
1194 extern __sfr __at (0xFC3) ADRES;
1196 extern __sfr __at (0xFC3) ADRESL;
1198 extern __sfr __at (0xFC4) ADRESH;
1200 extern __sfr __at (0xFC6) SSPCON;
1213 extern volatile __SSPCONbits_t __at (0xFC6) SSPCONbits;
1215 extern __sfr __at (0xFC7) SSPSTAT;
1240 unsigned NOT_WRITE : 1;
1243 unsigned NOT_ADDRESS : 1;
1250 unsigned READ_WRITE : 1;
1253 unsigned DATA_ADDRESS : 1;
1268 extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits;
1270 extern __sfr __at (0xFC8) SSPADD;
1272 extern __sfr __at (0xFC9) SSPBUF;
1274 extern __sfr __at (0xFCA) T2CON;
1277 unsigned T2CKPS0 : 1;
1278 unsigned T2CKPS1 : 1;
1279 unsigned TMR2ON : 1;
1280 unsigned T2OUTPS0 : 1;
1281 unsigned T2OUTPS1 : 1;
1282 unsigned T2OUTPS2 : 1;
1283 unsigned T2OUTPS3 : 1;
1287 extern volatile __T2CONbits_t __at (0xFCA) T2CONbits;
1289 extern __sfr __at (0xFCB) PR2;
1291 extern __sfr __at (0xFCC) TMR2;
1293 extern __sfr __at (0xFCD) T1CON;
1296 unsigned TMR1ON : 1;
1297 unsigned TMR1CS : 1;
1298 unsigned T1SYNC : 1;
1299 unsigned T1OSCEN : 1;
1300 unsigned T1CKPS0 : 1;
1301 unsigned T1CKPS1 : 1;
1308 unsigned T1INSYNC : 1;
1318 unsigned NOT_T1SYNC : 1;
1326 extern volatile __T1CONbits_t __at (0xFCD) T1CONbits;
1328 extern __sfr __at (0xFCE) TMR1L;
1330 extern __sfr __at (0xFCF) TMR1H;
1332 extern __sfr __at (0xFD0) RCON;
1335 unsigned NOT_BOR : 1;
1336 unsigned NOT_POR : 1;
1337 unsigned NOT_PD : 1;
1338 unsigned NOT_TO : 1;
1339 unsigned NOT_RI : 1;
1342 unsigned NOT_IPEN : 1;
1355 extern volatile __RCONbits_t __at (0xFD0) RCONbits;
1357 extern __sfr __at (0xFD1) WDTCON;
1360 unsigned SWDTEN : 1;
1380 extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits;
1382 extern __sfr __at (0xFD2) LVDCON;
1405 extern volatile __LVDCONbits_t __at (0xFD2) LVDCONbits;
1407 extern __sfr __at (0xFD3) OSCCON;
1430 extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits;
1432 extern __sfr __at (0xFD5) T0CON;
1441 unsigned T016BIT : 1;
1442 unsigned TMR0ON : 1;
1455 extern volatile __T0CONbits_t __at (0xFD5) T0CONbits;
1457 extern __sfr __at (0xFD6) TMR0L;
1459 extern __sfr __at (0xFD7) TMR0H;
1461 extern __sfr __at (0xFD8) STATUS;
1474 extern volatile __STATUSbits_t __at (0xFD8) STATUSbits;
1476 extern __sfr __at (0xFD9) FSR2L;
1478 extern __sfr __at (0xFDA) FSR2H;
1480 extern __sfr __at (0xFDB) PLUSW2;
1482 extern __sfr __at (0xFDC) PREINC2;
1484 extern __sfr __at (0xFDD) POSTDEC2;
1486 extern __sfr __at (0xFDE) POSTINC2;
1488 extern __sfr __at (0xFDF) INDF2;
1490 extern __sfr __at (0xFE0) BSR;
1492 extern __sfr __at (0xFE1) FSR1L;
1494 extern __sfr __at (0xFE2) FSR1H;
1496 extern __sfr __at (0xFE3) PLUSW1;
1498 extern __sfr __at (0xFE4) PREINC1;
1500 extern __sfr __at (0xFE5) POSTDEC1;
1502 extern __sfr __at (0xFE6) POSTINC1;
1504 extern __sfr __at (0xFE7) INDF1;
1506 extern __sfr __at (0xFE8) WREG;
1508 extern __sfr __at (0xFE9) FSR0L;
1510 extern __sfr __at (0xFEA) FSR0H;
1512 extern __sfr __at (0xFEB) PLUSW0;
1514 extern __sfr __at (0xFEC) PREINC0;
1516 extern __sfr __at (0xFED) POSTDEC0;
1518 extern __sfr __at (0xFEE) POSTINC0;
1520 extern __sfr __at (0xFEF) INDF0;
1522 extern __sfr __at (0xFF0) INTCON3;
1525 unsigned INT1IF : 1;
1526 unsigned INT2IF : 1;
1528 unsigned INT1IE : 1;
1529 unsigned INT2IE : 1;
1531 unsigned INT1IP : 1;
1532 unsigned INT2IP : 1;
1545 extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits;
1547 extern __sfr __at (0xFF1) INTCON2;
1552 unsigned TMR0IP : 1;
1554 unsigned INTEDG2 : 1;
1555 unsigned INTEDG1 : 1;
1556 unsigned INTEDG0 : 1;
1557 unsigned NOT_RBPU : 1;
1570 extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits;
1572 extern __sfr __at (0xFF2) INTCON;
1576 unsigned INT0IF : 1;
1577 unsigned TMR0IF : 1;
1579 unsigned INT0IE : 1;
1580 unsigned TMR0IE : 1;
1595 extern volatile __INTCONbits_t __at (0xFF2) INTCONbits;
1597 extern __sfr __at (0xFF3) PROD;
1599 extern __sfr __at (0xFF3) PRODL;
1601 extern __sfr __at (0xFF4) PRODH;
1603 extern __sfr __at (0xFF5) TABLAT;
1605 extern __sfr __at (0xFF6) TBLPTR;
1607 extern __sfr __at (0xFF6) TBLPTRL;
1609 extern __sfr __at (0xFF7) TBLPTRH;
1611 extern __sfr __at (0xFF8) TBLPTRU;
1613 extern __sfr __at (0xFF9) PC;
1615 extern __sfr __at (0xFF9) PCL;
1617 extern __sfr __at (0xFFA) PCLATH;
1619 extern __sfr __at (0xFFB) PCLATU;
1621 extern __sfr __at (0xFFC) STKPTR;
1624 unsigned STKPTR0 : 1;
1625 unsigned STKPTR1 : 1;
1626 unsigned STKPTR2 : 1;
1627 unsigned STKPTR3 : 1;
1628 unsigned STKPTR4 : 1;
1630 unsigned STKUNF : 1;
1631 unsigned STKOVF : 1;
1641 unsigned STKFUL : 1;
1644 extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits;
1646 extern __sfr __at (0xFFD) TOS;
1648 extern __sfr __at (0xFFD) TOSL;
1650 extern __sfr __at (0xFFE) TOSH;
1652 extern __sfr __at (0xFFF) TOSU;