2 // Register Declarations for Microchip 16F914 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRESH_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define OSCCON_ADDR 0x008F
70 #define OSCTUNE_ADDR 0x0090
71 #define ANSEL_ADDR 0x0091
72 #define PR2_ADDR 0x0092
73 #define SSPADD_ADDR 0x0093
74 #define SSPSTAT_ADDR 0x0094
75 #define WPUB_ADDR 0x0095
76 #define WPU_ADDR 0x0095
77 #define IOCB_ADDR 0x0096
78 #define IOC_ADDR 0x0096
79 #define CMCON1_ADDR 0x0097
80 #define TXSTA_ADDR 0x0098
81 #define SPBRG_ADDR 0x0099
82 #define CMCON0_ADDR 0x009C
83 #define VRCON_ADDR 0x009D
84 #define ADRESL_ADDR 0x009E
85 #define ADCON1_ADDR 0x009F
86 #define WDTCON_ADDR 0x0105
87 #define LCDCON_ADDR 0x0107
88 #define LCDPS_ADDR 0x0108
89 #define LVDCON_ADDR 0x0109
90 #define EEDATL_ADDR 0x010C
91 #define EEADRL_ADDR 0x010D
92 #define EEDATH_ADDR 0x010E
93 #define EEADRH_ADDR 0x010F
94 #define LCDDATA0_ADDR 0x0110
95 #define LCDDATA1_ADDR 0x0111
96 #define LCDDATA2_ADDR 0x0112
97 #define LCDDATA3_ADDR 0x0113
98 #define LCDDATA4_ADDR 0x0114
99 #define LCDDATA5_ADDR 0x0115
100 #define LCDDATA6_ADDR 0x0116
101 #define LCDDATA7_ADDR 0x0117
102 #define LCDDATA8_ADDR 0x0118
103 #define LCDDATA9_ADDR 0x0119
104 #define LCDDATA10_ADDR 0x011A
105 #define LCDDATA11_ADDR 0x011B
106 #define LCDSE0_ADDR 0x011C
107 #define LCDSE1_ADDR 0x011D
108 #define LCDSE2_ADDR 0x011E
109 #define EECON1_ADDR 0x018C
110 #define EECON2_ADDR 0x018D
113 // Memory organization.
119 // P16F914.INC Standard Header File, Version 1.03 Microchip Technology, Inc.
122 // This header file defines configurations, registers, and other useful bits of
123 // information for the PIC16F914 microcontroller.
124 // These names are taken to match the data sheets as closely as possible.
126 // Note that the processor must be selected before this file is
127 // included. The processor may be selected the following ways:
129 // 1. Command line switch:
130 // C:\ MPASM MYFILE.ASM /PIC16F914
131 // 2. LIST directive in the source file
133 // 3. Processor Type entry in the MPASM full-screen interface
135 //==========================================================================
139 //==========================================================================
142 //1.00 06/11/04 Initial Release
143 //1.01 08/16/04 Added EECON2
144 //1.02 05/20/05 Removed EECON2 from badram
145 //1.03 10/05/05 Correct names of bits in ANSEL, Add EEADRH and EEADRL bit
149 //==========================================================================
153 //==========================================================================
156 // MESSG "Processor-header file mismatch. Verify selected processor."
159 //==========================================================================
161 // Register Definitions
163 //==========================================================================
168 //----- Register Files------------------------------------------------------
170 extern __sfr __at (INDF_ADDR) INDF;
171 extern __sfr __at (TMR0_ADDR) TMR0;
172 extern __sfr __at (PCL_ADDR) PCL;
173 extern __sfr __at (STATUS_ADDR) STATUS;
174 extern __sfr __at (FSR_ADDR) FSR;
175 extern __sfr __at (PORTA_ADDR) PORTA;
176 extern __sfr __at (PORTB_ADDR) PORTB;
177 extern __sfr __at (PORTC_ADDR) PORTC;
178 extern __sfr __at (PORTD_ADDR) PORTD;
179 extern __sfr __at (PORTE_ADDR) PORTE;
180 extern __sfr __at (PCLATH_ADDR) PCLATH;
181 extern __sfr __at (INTCON_ADDR) INTCON;
182 extern __sfr __at (PIR1_ADDR) PIR1;
183 extern __sfr __at (PIR2_ADDR) PIR2;
184 extern __sfr __at (TMR1L_ADDR) TMR1L;
185 extern __sfr __at (TMR1H_ADDR) TMR1H;
186 extern __sfr __at (T1CON_ADDR) T1CON;
187 extern __sfr __at (TMR2_ADDR) TMR2;
188 extern __sfr __at (T2CON_ADDR) T2CON;
189 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
190 extern __sfr __at (SSPCON_ADDR) SSPCON;
191 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
192 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
193 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
194 extern __sfr __at (RCSTA_ADDR) RCSTA;
195 extern __sfr __at (TXREG_ADDR) TXREG;
196 extern __sfr __at (RCREG_ADDR) RCREG;
197 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
198 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
199 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
200 extern __sfr __at (ADRESH_ADDR) ADRESH;
201 extern __sfr __at (ADCON0_ADDR) ADCON0;
203 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
204 extern __sfr __at (TRISA_ADDR) TRISA;
205 extern __sfr __at (TRISB_ADDR) TRISB;
206 extern __sfr __at (TRISC_ADDR) TRISC;
207 extern __sfr __at (TRISD_ADDR) TRISD;
208 extern __sfr __at (TRISE_ADDR) TRISE;
209 extern __sfr __at (PIE1_ADDR) PIE1;
210 extern __sfr __at (PIE2_ADDR) PIE2;
211 extern __sfr __at (PCON_ADDR) PCON;
212 extern __sfr __at (OSCCON_ADDR) OSCCON;
213 extern __sfr __at (OSCTUNE_ADDR) OSCTUNE;
214 extern __sfr __at (ANSEL_ADDR) ANSEL;
215 extern __sfr __at (PR2_ADDR) PR2;
216 extern __sfr __at (SSPADD_ADDR) SSPADD;
217 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
218 extern __sfr __at (WPUB_ADDR) WPUB;
219 extern __sfr __at (WPU_ADDR) WPU;
220 extern __sfr __at (IOCB_ADDR) IOCB;
221 extern __sfr __at (IOC_ADDR) IOC;
222 extern __sfr __at (CMCON1_ADDR) CMCON1;
223 extern __sfr __at (TXSTA_ADDR) TXSTA;
224 extern __sfr __at (SPBRG_ADDR) SPBRG;
225 extern __sfr __at (CMCON0_ADDR) CMCON0;
226 extern __sfr __at (VRCON_ADDR) VRCON;
227 extern __sfr __at (ADRESL_ADDR) ADRESL;
228 extern __sfr __at (ADCON1_ADDR) ADCON1;
230 extern __sfr __at (WDTCON_ADDR) WDTCON;
231 extern __sfr __at (LCDCON_ADDR) LCDCON;
232 extern __sfr __at (LCDPS_ADDR) LCDPS;
233 extern __sfr __at (LVDCON_ADDR) LVDCON;
234 extern __sfr __at (EEDATL_ADDR) EEDATL;
235 extern __sfr __at (EEADRL_ADDR) EEADRL;
236 extern __sfr __at (EEDATH_ADDR) EEDATH;
237 extern __sfr __at (EEADRH_ADDR) EEADRH;
238 extern __sfr __at (LCDDATA0_ADDR) LCDDATA0;
239 extern __sfr __at (LCDDATA1_ADDR) LCDDATA1;
240 extern __sfr __at (LCDDATA2_ADDR) LCDDATA2;
241 extern __sfr __at (LCDDATA3_ADDR) LCDDATA3;
242 extern __sfr __at (LCDDATA4_ADDR) LCDDATA4;
243 extern __sfr __at (LCDDATA5_ADDR) LCDDATA5;
244 extern __sfr __at (LCDDATA6_ADDR) LCDDATA6;
245 extern __sfr __at (LCDDATA7_ADDR) LCDDATA7;
246 extern __sfr __at (LCDDATA8_ADDR) LCDDATA8;
247 extern __sfr __at (LCDDATA9_ADDR) LCDDATA9;
248 extern __sfr __at (LCDDATA10_ADDR) LCDDATA10;
249 extern __sfr __at (LCDDATA11_ADDR) LCDDATA11;
250 extern __sfr __at (LCDSE0_ADDR) LCDSE0;
251 extern __sfr __at (LCDSE1_ADDR) LCDSE1;
252 extern __sfr __at (LCDSE2_ADDR) LCDSE2;
254 extern __sfr __at (EECON1_ADDR) EECON1;
255 extern __sfr __at (EECON2_ADDR) EECON2;
258 //----- STATUS Bits --------------------------------------------------------
261 //----- INTCON Bits --------------------------------------------------------
264 //----- PIR1 Bits ----------------------------------------------------------
267 //----- PIR2 Bits ----------------------------------------------------------
270 //----- T1CON Bits ---------------------------------------------------------
273 //----- T2CON Bits ---------------------------------------------------------
276 //----- SSPCON Bits --------------------------------------------------------
279 //----- CCP1CON Bits -------------------------------------------------------
282 //----- RCSTA Bits ---------------------------------------------------------
285 //----- CCP2CON Bits -------------------------------------------------------
288 //----- ADCON0 Bits --------------------------------------------------------
291 //----- OPTION_REG Bits -----------------------------------------------------
294 //----- PIE1 Bits ----------------------------------------------------------
297 //----- PIE2 Bits ----------------------------------------------------------
300 //----- PCON Bits ----------------------------------------------------------
303 //----- OSCCON Bits -------------------------------------------------------
306 //----- OSCTUNE Bits -------------------------------------------------------
310 //----- ANSEL Bits ---------------------------------------------------------
314 //----- SSPSTAT Bits -------------------------------------------------------
318 //----- WPUB Bits -------------------------------------------------------
321 //----- WPU Bits -------------------------------------------------------
325 //----- IOCB Bits -------------------------------------------------------
329 //----- IOC Bits -------------------------------------------------------
333 //----- CMCON1 Bits --------------------------------------------------------
336 //----- TXSTA Bits ---------------------------------------------------------
340 //----- CMCON0 Bits ---------------------------------------------------------
343 //----- VRCON Bits --------------------------------------------------------
346 //----- ADCON1 Bits --------------------------------------------------------
349 //----- WDTCON Bits --------------------------------------------------------
352 //----- LCDCON Bits --------------------------------------------------------
355 //----- LCDPS Bits ---------------------------------------------------------
358 //----- LVDCON Bits --------------------------------------------------------
361 //----- LCDDATA0 Bits -------------------------------------------------------
365 //----- LCDDATA1 Bits -------------------------------------------------------
369 //----- LCDDATA2 Bits -------------------------------------------------------
373 //----- LCDDATA3 Bits -------------------------------------------------------
377 //----- LCDDATA4 Bits -------------------------------------------------------
381 //----- LCDDATA5 Bits -------------------------------------------------------
385 //----- LCDDATA6 Bits -------------------------------------------------------
389 //----- LCDDATA7 Bits -------------------------------------------------------
393 //----- LCDDATA8 Bits -------------------------------------------------------
397 //----- LCDDATA9 Bits -------------------------------------------------------
401 //----- LCDDATA10 Bits -------------------------------------------------------
405 //----- LCDDATA11 Bits -------------------------------------------------------
409 //----- LCDSE0 Bits --------------------------------------------------------
413 //----- LCDSE1 Bits --------------------------------------------------------
417 //----- LCDSE2 Bits --------------------------------------------------------
421 //----- EECON1 Bits --------------------------------------------------------
424 //----- EEADRH Bits --------------------------------------------------------
427 //----- EEADRL Bits --------------------------------------------------------
431 //==========================================================================
435 //==========================================================================
438 // __BADRAM H'9A'-H'9B'
440 // __BADRAM H'185', H'187'-H'189', H'18E'-H'1EF'
442 //==========================================================================
444 // Configuration Bits
446 //==========================================================================
448 #define _CONFIG 0x2007
450 //Configuration Byte 1 Options
451 #define _DEBUG_ON 0x2FFF
452 #define _DEBUG_OFF 0x3FFF
453 #define _FCMEN_ON 0x3FFF
454 #define _FCMEN_OFF 0x37FF
455 #define _IESO_ON 0x3FFF
456 #define _IESO_OFF 0x3BFF
457 #define _BOD_ON 0x3FFF
458 #define _BOD_NSLEEP 0x3EFF
459 #define _BOD_SBODEN 0x3DFF
460 #define _BOD_OFF 0x3CFF
461 #define _CPD_ON 0x3F7F
462 #define _CPD_OFF 0x3FFF
463 #define _CP_ON 0x3FBF
464 #define _CP_OFF 0x3FFF
465 #define _MCLRE_ON 0x3FFF
466 #define _MCLRE_OFF 0x3FDF
467 #define _PWRTE_ON 0x3FEF
468 #define _PWRTE_OFF 0x3FFF
469 #define _WDT_ON 0x3FFF
470 #define _WDT_OFF 0x3FF7
471 #define _LP_OSC 0x3FF8
472 #define _XT_OSC 0x3FF9
473 #define _HS_OSC 0x3FFA
474 #define _EC_OSC 0x3FFB
475 #define _INTRC_OSC_NOCLKOUT 0x3FFC
476 #define _INTRC_OSC_CLKOUT 0x3FFD
477 #define _EXTRC_OSC_NOCLKOUT 0x3FFE
478 #define _EXTRC_OSC_CLKOUT 0x3FFF
479 #define _INTOSCIO 0x3FFC
480 #define _INTOSC 0x3FFD
481 #define _EXTRCIO 0x3FFE
482 #define _EXTRC 0x3FFF
487 // ----- ADCON0 bits --------------------
490 unsigned char ADON:1;
491 unsigned char NOT_DONE:1;
492 unsigned char CHS0:1;
493 unsigned char CHS1:1;
494 unsigned char CHS2:1;
495 unsigned char VCFG0:1;
496 unsigned char VCFG1:1;
497 unsigned char ADFM:1;
501 unsigned char GO_DONE:1;
510 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
512 #define ADON ADCON0_bits.ADON
513 #define NOT_DONE ADCON0_bits.NOT_DONE
514 #define GO_DONE ADCON0_bits.GO_DONE
515 #define CHS0 ADCON0_bits.CHS0
516 #define CHS1 ADCON0_bits.CHS1
517 #define CHS2 ADCON0_bits.CHS2
518 #define VCFG0 ADCON0_bits.VCFG0
519 #define VCFG1 ADCON0_bits.VCFG1
520 #define ADFM ADCON0_bits.ADFM
522 // ----- ADCON1 bits --------------------
529 unsigned char ADCS0:1;
530 unsigned char ADCS1:1;
531 unsigned char ADCS2:1;
535 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
537 #define ADCS0 ADCON1_bits.ADCS0
538 #define ADCS1 ADCON1_bits.ADCS1
539 #define ADCS2 ADCON1_bits.ADCS2
541 // ----- ANSEL bits --------------------
544 unsigned char ANS0:1;
545 unsigned char ANS1:1;
546 unsigned char ANS2:1;
547 unsigned char ANS3:1;
548 unsigned char ANS4:1;
549 unsigned char ANS5:1;
550 unsigned char ANS6:1;
551 unsigned char ANS7:1;
564 extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
566 #define ANS0 ANSEL_bits.ANS0
567 #define AN0 ANSEL_bits.AN0
568 #define ANS1 ANSEL_bits.ANS1
569 #define AN1 ANSEL_bits.AN1
570 #define ANS2 ANSEL_bits.ANS2
571 #define AN2 ANSEL_bits.AN2
572 #define ANS3 ANSEL_bits.ANS3
573 #define AN3 ANSEL_bits.AN3
574 #define ANS4 ANSEL_bits.ANS4
575 #define AN4 ANSEL_bits.AN4
576 #define ANS5 ANSEL_bits.ANS5
577 #define AN5 ANSEL_bits.AN5
578 #define ANS6 ANSEL_bits.ANS6
579 #define AN6 ANSEL_bits.AN6
580 #define ANS7 ANSEL_bits.ANS7
581 #define AN7 ANSEL_bits.AN7
583 // ----- CCP1CON bits --------------------
586 unsigned char CCP1M0:1;
587 unsigned char CCP1M1:1;
588 unsigned char CCP1M2:1;
589 unsigned char CCP1M3:1;
590 unsigned char CCP1Y:1;
591 unsigned char CCP1X:1;
596 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
598 #define CCP1M0 CCP1CON_bits.CCP1M0
599 #define CCP1M1 CCP1CON_bits.CCP1M1
600 #define CCP1M2 CCP1CON_bits.CCP1M2
601 #define CCP1M3 CCP1CON_bits.CCP1M3
602 #define CCP1Y CCP1CON_bits.CCP1Y
603 #define CCP1X CCP1CON_bits.CCP1X
605 // ----- CCP2CON bits --------------------
608 unsigned char CCP2M0:1;
609 unsigned char CCP2M1:1;
610 unsigned char CCP2M2:1;
611 unsigned char CCP2M3:1;
612 unsigned char CCP2Y:1;
613 unsigned char CCP2X:1;
618 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
620 #define CCP2M0 CCP2CON_bits.CCP2M0
621 #define CCP2M1 CCP2CON_bits.CCP2M1
622 #define CCP2M2 CCP2CON_bits.CCP2M2
623 #define CCP2M3 CCP2CON_bits.CCP2M3
624 #define CCP2Y CCP2CON_bits.CCP2Y
625 #define CCP2X CCP2CON_bits.CCP2X
627 // ----- CMCON0 bits --------------------
634 unsigned char C1INV:1;
635 unsigned char C2INV:1;
636 unsigned char C1OUT:1;
637 unsigned char C2OUT:1;
640 extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits;
642 #define CM0 CMCON0_bits.CM0
643 #define CM1 CMCON0_bits.CM1
644 #define CM2 CMCON0_bits.CM2
645 #define CIS CMCON0_bits.CIS
646 #define C1INV CMCON0_bits.C1INV
647 #define C2INV CMCON0_bits.C2INV
648 #define C1OUT CMCON0_bits.C1OUT
649 #define C2OUT CMCON0_bits.C2OUT
651 // ----- CMCON1 bits --------------------
654 unsigned char C2SYNC:1;
655 unsigned char T1GSS:1;
664 extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits;
666 #define C2SYNC CMCON1_bits.C2SYNC
667 #define T1GSS CMCON1_bits.T1GSS
669 // ----- EEADRH bits --------------------
672 unsigned char EEADRH0:1;
673 unsigned char EEADRH1:1;
674 unsigned char EEADRH2:1;
675 unsigned char EEADRH3:1;
676 unsigned char EEADRH4:1;
682 extern volatile __EEADRH_bits_t __at(EEADRH_ADDR) EEADRH_bits;
684 #define EEADRH0 EEADRH_bits.EEADRH0
685 #define EEADRH1 EEADRH_bits.EEADRH1
686 #define EEADRH2 EEADRH_bits.EEADRH2
687 #define EEADRH3 EEADRH_bits.EEADRH3
688 #define EEADRH4 EEADRH_bits.EEADRH4
690 // ----- EEADRL bits --------------------
693 unsigned char EEADRL0:1;
694 unsigned char EEADRL1:1;
695 unsigned char EEADRL2:1;
696 unsigned char EEADRL3:1;
697 unsigned char EEADRL4:1;
698 unsigned char EEADRL5:1;
699 unsigned char EEADRL6:1;
700 unsigned char EEADRL7:1;
703 extern volatile __EEADRL_bits_t __at(EEADRL_ADDR) EEADRL_bits;
705 #define EEADRL0 EEADRL_bits.EEADRL0
706 #define EEADRL1 EEADRL_bits.EEADRL1
707 #define EEADRL2 EEADRL_bits.EEADRL2
708 #define EEADRL3 EEADRL_bits.EEADRL3
709 #define EEADRL4 EEADRL_bits.EEADRL4
710 #define EEADRL5 EEADRL_bits.EEADRL5
711 #define EEADRL6 EEADRL_bits.EEADRL6
712 #define EEADRL7 EEADRL_bits.EEADRL7
714 // ----- EECON1 bits --------------------
719 unsigned char WREN:1;
720 unsigned char WRERR:1;
724 unsigned char EEPGD:1;
727 unsigned char EERD:1;
728 unsigned char EEWR:1;
737 extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
739 #define RD EECON1_bits.RD
740 #define EERD EECON1_bits.EERD
741 #define WR EECON1_bits.WR
742 #define EEWR EECON1_bits.EEWR
743 #define WREN EECON1_bits.WREN
744 #define WRERR EECON1_bits.WRERR
745 #define EEPGD EECON1_bits.EEPGD
747 // ----- INTCON bits --------------------
750 unsigned char RBIF:1;
751 unsigned char INTF:1;
752 unsigned char T0IF:1;
753 unsigned char RBIE:1;
754 unsigned char INTE:1;
755 unsigned char T0IE:1;
756 unsigned char PEIE:1;
762 unsigned char TMR0IF:1;
765 unsigned char TMR0IE:1;
770 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
772 #define RBIF INTCON_bits.RBIF
773 #define INTF INTCON_bits.INTF
774 #define T0IF INTCON_bits.T0IF
775 #define TMR0IF INTCON_bits.TMR0IF
776 #define RBIE INTCON_bits.RBIE
777 #define INTE INTCON_bits.INTE
778 #define T0IE INTCON_bits.T0IE
779 #define TMR0IE INTCON_bits.TMR0IE
780 #define PEIE INTCON_bits.PEIE
781 #define GIE INTCON_bits.GIE
783 // ----- IOC bits --------------------
790 unsigned char IOC4:1;
791 unsigned char IOC5:1;
792 unsigned char IOC6:1;
793 unsigned char IOC7:1;
796 extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
798 #define IOC4 IOC_bits.IOC4
799 #define IOC5 IOC_bits.IOC5
800 #define IOC6 IOC_bits.IOC6
801 #define IOC7 IOC_bits.IOC7
803 // ----- IOCB bits --------------------
810 unsigned char IOCB4:1;
811 unsigned char IOCB5:1;
812 unsigned char IOCB6:1;
813 unsigned char IOCB7:1;
816 extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
818 #define IOCB4 IOCB_bits.IOCB4
819 #define IOCB5 IOCB_bits.IOCB5
820 #define IOCB6 IOCB_bits.IOCB6
821 #define IOCB7 IOCB_bits.IOCB7
823 // ----- LCDCON bits --------------------
826 unsigned char LMUX0:1;
827 unsigned char LMUX1:1;
830 unsigned char VLCDEN:1;
831 unsigned char WERR:1;
832 unsigned char SLPEN:1;
833 unsigned char LCDEN:1;
836 extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits;
838 #define LMUX0 LCDCON_bits.LMUX0
839 #define LMUX1 LCDCON_bits.LMUX1
840 #define CS0 LCDCON_bits.CS0
841 #define CS1 LCDCON_bits.CS1
842 #define VLCDEN LCDCON_bits.VLCDEN
843 #define WERR LCDCON_bits.WERR
844 #define SLPEN LCDCON_bits.SLPEN
845 #define LCDEN LCDCON_bits.LCDEN
847 // ----- LCDDATA0 bits --------------------
850 unsigned char SEG0COM0:1;
851 unsigned char SEG1COM0:1;
852 unsigned char SEG2COM0:1;
853 unsigned char SEG3COM0:1;
854 unsigned char SEG4COM0:1;
855 unsigned char SEG5COM0:1;
856 unsigned char SEG6COM0:1;
857 unsigned char SEG7COM0:1;
860 unsigned char S0C0:1;
861 unsigned char S1C0:1;
862 unsigned char S2C0:1;
863 unsigned char S3C0:1;
864 unsigned char S4C0:1;
865 unsigned char S5C0:1;
866 unsigned char S6C0:1;
867 unsigned char S7C0:1;
870 extern volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits;
872 #define SEG0COM0 LCDDATA0_bits.SEG0COM0
873 #define S0C0 LCDDATA0_bits.S0C0
874 #define SEG1COM0 LCDDATA0_bits.SEG1COM0
875 #define S1C0 LCDDATA0_bits.S1C0
876 #define SEG2COM0 LCDDATA0_bits.SEG2COM0
877 #define S2C0 LCDDATA0_bits.S2C0
878 #define SEG3COM0 LCDDATA0_bits.SEG3COM0
879 #define S3C0 LCDDATA0_bits.S3C0
880 #define SEG4COM0 LCDDATA0_bits.SEG4COM0
881 #define S4C0 LCDDATA0_bits.S4C0
882 #define SEG5COM0 LCDDATA0_bits.SEG5COM0
883 #define S5C0 LCDDATA0_bits.S5C0
884 #define SEG6COM0 LCDDATA0_bits.SEG6COM0
885 #define S6C0 LCDDATA0_bits.S6C0
886 #define SEG7COM0 LCDDATA0_bits.SEG7COM0
887 #define S7C0 LCDDATA0_bits.S7C0
889 // ----- LCDDATA1 bits --------------------
892 unsigned char SEG8COM0:1;
893 unsigned char SEG9COM0:1;
894 unsigned char SEG10COM0:1;
895 unsigned char SEG11COM0:1;
896 unsigned char SEG12COM0:1;
897 unsigned char SEG13COM0:1;
898 unsigned char SEG14COM0:1;
899 unsigned char SEG15COM0:1;
902 unsigned char S8C0:1;
903 unsigned char S9C0:1;
904 unsigned char S10C0:1;
905 unsigned char S11C0:1;
906 unsigned char S12C0:1;
907 unsigned char S13C0:1;
908 unsigned char S14C0:1;
909 unsigned char S15C0:1;
912 extern volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits;
914 #define SEG8COM0 LCDDATA1_bits.SEG8COM0
915 #define S8C0 LCDDATA1_bits.S8C0
916 #define SEG9COM0 LCDDATA1_bits.SEG9COM0
917 #define S9C0 LCDDATA1_bits.S9C0
918 #define SEG10COM0 LCDDATA1_bits.SEG10COM0
919 #define S10C0 LCDDATA1_bits.S10C0
920 #define SEG11COM0 LCDDATA1_bits.SEG11COM0
921 #define S11C0 LCDDATA1_bits.S11C0
922 #define SEG12COM0 LCDDATA1_bits.SEG12COM0
923 #define S12C0 LCDDATA1_bits.S12C0
924 #define SEG13COM0 LCDDATA1_bits.SEG13COM0
925 #define S13C0 LCDDATA1_bits.S13C0
926 #define SEG14COM0 LCDDATA1_bits.SEG14COM0
927 #define S14C0 LCDDATA1_bits.S14C0
928 #define SEG15COM0 LCDDATA1_bits.SEG15COM0
929 #define S15C0 LCDDATA1_bits.S15C0
931 // ----- LCDDATA10 bits --------------------
934 unsigned char SEG8COM3:1;
935 unsigned char SEG9COM3:1;
936 unsigned char SEG10COM3:1;
937 unsigned char SEG11COM3:1;
938 unsigned char SEG12COM3:1;
939 unsigned char SEG13COM3:1;
940 unsigned char SEG14COM3:1;
941 unsigned char SEG15COM3:1;
944 unsigned char S8C3:1;
945 unsigned char S9C3:1;
946 unsigned char S10C3:1;
947 unsigned char S11C3:1;
948 unsigned char S12C3:1;
949 unsigned char S13C3:1;
950 unsigned char S14C3:1;
951 unsigned char S15C3:1;
953 } __LCDDATA10_bits_t;
954 extern volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits;
956 #define SEG8COM3 LCDDATA10_bits.SEG8COM3
957 #define S8C3 LCDDATA10_bits.S8C3
958 #define SEG9COM3 LCDDATA10_bits.SEG9COM3
959 #define S9C3 LCDDATA10_bits.S9C3
960 #define SEG10COM3 LCDDATA10_bits.SEG10COM3
961 #define S10C3 LCDDATA10_bits.S10C3
962 #define SEG11COM3 LCDDATA10_bits.SEG11COM3
963 #define S11C3 LCDDATA10_bits.S11C3
964 #define SEG12COM3 LCDDATA10_bits.SEG12COM3
965 #define S12C3 LCDDATA10_bits.S12C3
966 #define SEG13COM3 LCDDATA10_bits.SEG13COM3
967 #define S13C3 LCDDATA10_bits.S13C3
968 #define SEG14COM3 LCDDATA10_bits.SEG14COM3
969 #define S14C3 LCDDATA10_bits.S14C3
970 #define SEG15COM3 LCDDATA10_bits.SEG15COM3
971 #define S15C3 LCDDATA10_bits.S15C3
973 // ----- LCDDATA11 bits --------------------
976 unsigned char SEG16COM3:1;
977 unsigned char SEG17COM3:1;
978 unsigned char SEG18COM3:1;
979 unsigned char SEG19COM3:1;
980 unsigned char SEG20COM3:1;
981 unsigned char SEG21COM3:1;
982 unsigned char SEG22COM3:1;
983 unsigned char SEG23COM3:1;
986 unsigned char S16C3:1;
987 unsigned char S17C3:1;
988 unsigned char S18C3:1;
989 unsigned char S19C3:1;
990 unsigned char S20C3:1;
991 unsigned char S21C3:1;
992 unsigned char S22C3:1;
993 unsigned char S23C3:1;
995 } __LCDDATA11_bits_t;
996 extern volatile __LCDDATA11_bits_t __at(LCDDATA11_ADDR) LCDDATA11_bits;
998 #define SEG16COM3 LCDDATA11_bits.SEG16COM3
999 #define S16C3 LCDDATA11_bits.S16C3
1000 #define SEG17COM3 LCDDATA11_bits.SEG17COM3
1001 #define S17C3 LCDDATA11_bits.S17C3
1002 #define SEG18COM3 LCDDATA11_bits.SEG18COM3
1003 #define S18C3 LCDDATA11_bits.S18C3
1004 #define SEG19COM3 LCDDATA11_bits.SEG19COM3
1005 #define S19C3 LCDDATA11_bits.S19C3
1006 #define SEG20COM3 LCDDATA11_bits.SEG20COM3
1007 #define S20C3 LCDDATA11_bits.S20C3
1008 #define SEG21COM3 LCDDATA11_bits.SEG21COM3
1009 #define S21C3 LCDDATA11_bits.S21C3
1010 #define SEG22COM3 LCDDATA11_bits.SEG22COM3
1011 #define S22C3 LCDDATA11_bits.S22C3
1012 #define SEG23COM3 LCDDATA11_bits.SEG23COM3
1013 #define S23C3 LCDDATA11_bits.S23C3
1015 // ----- LCDDATA2 bits --------------------
1018 unsigned char SEG16COM0:1;
1019 unsigned char SEG17COM0:1;
1020 unsigned char SEG18COM0:1;
1021 unsigned char SEG19COM0:1;
1022 unsigned char SEG20COM0:1;
1023 unsigned char SEG21COM0:1;
1024 unsigned char SEG22COM0:1;
1025 unsigned char SEG23COM0:1;
1028 unsigned char S16C0:1;
1029 unsigned char S17C0:1;
1030 unsigned char S18C0:1;
1031 unsigned char S19C0:1;
1032 unsigned char S20C0:1;
1033 unsigned char S21C0:1;
1034 unsigned char S22C0:1;
1035 unsigned char S23C0:1;
1037 } __LCDDATA2_bits_t;
1038 extern volatile __LCDDATA2_bits_t __at(LCDDATA2_ADDR) LCDDATA2_bits;
1040 #define SEG16COM0 LCDDATA2_bits.SEG16COM0
1041 #define S16C0 LCDDATA2_bits.S16C0
1042 #define SEG17COM0 LCDDATA2_bits.SEG17COM0
1043 #define S17C0 LCDDATA2_bits.S17C0
1044 #define SEG18COM0 LCDDATA2_bits.SEG18COM0
1045 #define S18C0 LCDDATA2_bits.S18C0
1046 #define SEG19COM0 LCDDATA2_bits.SEG19COM0
1047 #define S19C0 LCDDATA2_bits.S19C0
1048 #define SEG20COM0 LCDDATA2_bits.SEG20COM0
1049 #define S20C0 LCDDATA2_bits.S20C0
1050 #define SEG21COM0 LCDDATA2_bits.SEG21COM0
1051 #define S21C0 LCDDATA2_bits.S21C0
1052 #define SEG22COM0 LCDDATA2_bits.SEG22COM0
1053 #define S22C0 LCDDATA2_bits.S22C0
1054 #define SEG23COM0 LCDDATA2_bits.SEG23COM0
1055 #define S23C0 LCDDATA2_bits.S23C0
1057 // ----- LCDDATA3 bits --------------------
1060 unsigned char SEG0COM1:1;
1061 unsigned char SEG1COM1:1;
1062 unsigned char SEG2COM1:1;
1063 unsigned char SEG3COM1:1;
1064 unsigned char SEG4COM1:1;
1065 unsigned char SEG5COM1:1;
1066 unsigned char SEG6COM1:1;
1067 unsigned char SEG7COM1:1;
1070 unsigned char S0C1:1;
1071 unsigned char S1C1:1;
1072 unsigned char S2C1:1;
1073 unsigned char S3C1:1;
1074 unsigned char S4C1:1;
1075 unsigned char S5C1:1;
1076 unsigned char S6C1:1;
1077 unsigned char S7C1:1;
1079 } __LCDDATA3_bits_t;
1080 extern volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits;
1082 #define SEG0COM1 LCDDATA3_bits.SEG0COM1
1083 #define S0C1 LCDDATA3_bits.S0C1
1084 #define SEG1COM1 LCDDATA3_bits.SEG1COM1
1085 #define S1C1 LCDDATA3_bits.S1C1
1086 #define SEG2COM1 LCDDATA3_bits.SEG2COM1
1087 #define S2C1 LCDDATA3_bits.S2C1
1088 #define SEG3COM1 LCDDATA3_bits.SEG3COM1
1089 #define S3C1 LCDDATA3_bits.S3C1
1090 #define SEG4COM1 LCDDATA3_bits.SEG4COM1
1091 #define S4C1 LCDDATA3_bits.S4C1
1092 #define SEG5COM1 LCDDATA3_bits.SEG5COM1
1093 #define S5C1 LCDDATA3_bits.S5C1
1094 #define SEG6COM1 LCDDATA3_bits.SEG6COM1
1095 #define S6C1 LCDDATA3_bits.S6C1
1096 #define SEG7COM1 LCDDATA3_bits.SEG7COM1
1097 #define S7C1 LCDDATA3_bits.S7C1
1099 // ----- LCDDATA4 bits --------------------
1102 unsigned char SEG8COM1:1;
1103 unsigned char SEG9COM1:1;
1104 unsigned char SEG10COM1:1;
1105 unsigned char SEG11COM1:1;
1106 unsigned char SEG12COM1:1;
1107 unsigned char SEG13COM1:1;
1108 unsigned char SEG14COM1:1;
1109 unsigned char SEG15COM1:1;
1112 unsigned char S8C1:1;
1113 unsigned char S9C1:1;
1114 unsigned char S10C1:1;
1115 unsigned char S11C1:1;
1116 unsigned char S12C1:1;
1117 unsigned char S13C1:1;
1118 unsigned char S14C1:1;
1119 unsigned char S15C1:1;
1121 } __LCDDATA4_bits_t;
1122 extern volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits;
1124 #define SEG8COM1 LCDDATA4_bits.SEG8COM1
1125 #define S8C1 LCDDATA4_bits.S8C1
1126 #define SEG9COM1 LCDDATA4_bits.SEG9COM1
1127 #define S9C1 LCDDATA4_bits.S9C1
1128 #define SEG10COM1 LCDDATA4_bits.SEG10COM1
1129 #define S10C1 LCDDATA4_bits.S10C1
1130 #define SEG11COM1 LCDDATA4_bits.SEG11COM1
1131 #define S11C1 LCDDATA4_bits.S11C1
1132 #define SEG12COM1 LCDDATA4_bits.SEG12COM1
1133 #define S12C1 LCDDATA4_bits.S12C1
1134 #define SEG13COM1 LCDDATA4_bits.SEG13COM1
1135 #define S13C1 LCDDATA4_bits.S13C1
1136 #define SEG14COM1 LCDDATA4_bits.SEG14COM1
1137 #define S14C1 LCDDATA4_bits.S14C1
1138 #define SEG15COM1 LCDDATA4_bits.SEG15COM1
1139 #define S15C1 LCDDATA4_bits.S15C1
1141 // ----- LCDDATA5 bits --------------------
1144 unsigned char SEG16COM1:1;
1145 unsigned char SEG17COM1:1;
1146 unsigned char SEG18COM1:1;
1147 unsigned char SEG19COM1:1;
1148 unsigned char SEG20COM1:1;
1149 unsigned char SEG21COM1:1;
1150 unsigned char SEG22COM1:1;
1151 unsigned char SEG23COM1:1;
1154 unsigned char S16C1:1;
1155 unsigned char S17C1:1;
1156 unsigned char S18C1:1;
1157 unsigned char S19C1:1;
1158 unsigned char S20C1:1;
1159 unsigned char S21C1:1;
1160 unsigned char S22C1:1;
1161 unsigned char S23C1:1;
1163 } __LCDDATA5_bits_t;
1164 extern volatile __LCDDATA5_bits_t __at(LCDDATA5_ADDR) LCDDATA5_bits;
1166 #define SEG16COM1 LCDDATA5_bits.SEG16COM1
1167 #define S16C1 LCDDATA5_bits.S16C1
1168 #define SEG17COM1 LCDDATA5_bits.SEG17COM1
1169 #define S17C1 LCDDATA5_bits.S17C1
1170 #define SEG18COM1 LCDDATA5_bits.SEG18COM1
1171 #define S18C1 LCDDATA5_bits.S18C1
1172 #define SEG19COM1 LCDDATA5_bits.SEG19COM1
1173 #define S19C1 LCDDATA5_bits.S19C1
1174 #define SEG20COM1 LCDDATA5_bits.SEG20COM1
1175 #define S20C1 LCDDATA5_bits.S20C1
1176 #define SEG21COM1 LCDDATA5_bits.SEG21COM1
1177 #define S21C1 LCDDATA5_bits.S21C1
1178 #define SEG22COM1 LCDDATA5_bits.SEG22COM1
1179 #define S22C1 LCDDATA5_bits.S22C1
1180 #define SEG23COM1 LCDDATA5_bits.SEG23COM1
1181 #define S23C1 LCDDATA5_bits.S23C1
1183 // ----- LCDDATA6 bits --------------------
1186 unsigned char SEG0COM2:1;
1187 unsigned char SEG1COM2:1;
1188 unsigned char SEG2COM2:1;
1189 unsigned char SEG3COM2:1;
1190 unsigned char SEG4COM2:1;
1191 unsigned char SEG5COM2:1;
1192 unsigned char SEG6COM2:1;
1193 unsigned char SEG7COM2:1;
1196 unsigned char S0C2:1;
1197 unsigned char S1C2:1;
1198 unsigned char S2C2:1;
1199 unsigned char S3C2:1;
1200 unsigned char S4C2:1;
1201 unsigned char S5C2:1;
1202 unsigned char S6C2:1;
1203 unsigned char S7C2:1;
1205 } __LCDDATA6_bits_t;
1206 extern volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits;
1208 #define SEG0COM2 LCDDATA6_bits.SEG0COM2
1209 #define S0C2 LCDDATA6_bits.S0C2
1210 #define SEG1COM2 LCDDATA6_bits.SEG1COM2
1211 #define S1C2 LCDDATA6_bits.S1C2
1212 #define SEG2COM2 LCDDATA6_bits.SEG2COM2
1213 #define S2C2 LCDDATA6_bits.S2C2
1214 #define SEG3COM2 LCDDATA6_bits.SEG3COM2
1215 #define S3C2 LCDDATA6_bits.S3C2
1216 #define SEG4COM2 LCDDATA6_bits.SEG4COM2
1217 #define S4C2 LCDDATA6_bits.S4C2
1218 #define SEG5COM2 LCDDATA6_bits.SEG5COM2
1219 #define S5C2 LCDDATA6_bits.S5C2
1220 #define SEG6COM2 LCDDATA6_bits.SEG6COM2
1221 #define S6C2 LCDDATA6_bits.S6C2
1222 #define SEG7COM2 LCDDATA6_bits.SEG7COM2
1223 #define S7C2 LCDDATA6_bits.S7C2
1225 // ----- LCDDATA7 bits --------------------
1228 unsigned char SEG8COM2:1;
1229 unsigned char SEG9COM2:1;
1230 unsigned char SEG10COM2:1;
1231 unsigned char SEG11COM2:1;
1232 unsigned char SEG12COM2:1;
1233 unsigned char SEG13COM2:1;
1234 unsigned char SEG14COM2:1;
1235 unsigned char SEG15COM2:1;
1238 unsigned char S8C2:1;
1239 unsigned char S9C2:1;
1240 unsigned char S10C2:1;
1241 unsigned char S11C2:1;
1242 unsigned char S12C2:1;
1243 unsigned char S13C2:1;
1244 unsigned char S14C2:1;
1245 unsigned char S15C2:1;
1247 } __LCDDATA7_bits_t;
1248 extern volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits;
1250 #define SEG8COM2 LCDDATA7_bits.SEG8COM2
1251 #define S8C2 LCDDATA7_bits.S8C2
1252 #define SEG9COM2 LCDDATA7_bits.SEG9COM2
1253 #define S9C2 LCDDATA7_bits.S9C2
1254 #define SEG10COM2 LCDDATA7_bits.SEG10COM2
1255 #define S10C2 LCDDATA7_bits.S10C2
1256 #define SEG11COM2 LCDDATA7_bits.SEG11COM2
1257 #define S11C2 LCDDATA7_bits.S11C2
1258 #define SEG12COM2 LCDDATA7_bits.SEG12COM2
1259 #define S12C2 LCDDATA7_bits.S12C2
1260 #define SEG13COM2 LCDDATA7_bits.SEG13COM2
1261 #define S13C2 LCDDATA7_bits.S13C2
1262 #define SEG14COM2 LCDDATA7_bits.SEG14COM2
1263 #define S14C2 LCDDATA7_bits.S14C2
1264 #define SEG15COM2 LCDDATA7_bits.SEG15COM2
1265 #define S15C2 LCDDATA7_bits.S15C2
1267 // ----- LCDDATA8 bits --------------------
1270 unsigned char SEG16COM2:1;
1271 unsigned char SEG17COM2:1;
1272 unsigned char SEG18COM2:1;
1273 unsigned char SEG19COM2:1;
1274 unsigned char SEG20COM2:1;
1275 unsigned char SEG21COM2:1;
1276 unsigned char SEG22COM2:1;
1277 unsigned char SEG23COM2:1;
1280 unsigned char S16C2:1;
1281 unsigned char S17C2:1;
1282 unsigned char S18C2:1;
1283 unsigned char S19C2:1;
1284 unsigned char S20C2:1;
1285 unsigned char S21C2:1;
1286 unsigned char S22C2:1;
1287 unsigned char S23C2:1;
1289 } __LCDDATA8_bits_t;
1290 extern volatile __LCDDATA8_bits_t __at(LCDDATA8_ADDR) LCDDATA8_bits;
1292 #define SEG16COM2 LCDDATA8_bits.SEG16COM2
1293 #define S16C2 LCDDATA8_bits.S16C2
1294 #define SEG17COM2 LCDDATA8_bits.SEG17COM2
1295 #define S17C2 LCDDATA8_bits.S17C2
1296 #define SEG18COM2 LCDDATA8_bits.SEG18COM2
1297 #define S18C2 LCDDATA8_bits.S18C2
1298 #define SEG19COM2 LCDDATA8_bits.SEG19COM2
1299 #define S19C2 LCDDATA8_bits.S19C2
1300 #define SEG20COM2 LCDDATA8_bits.SEG20COM2
1301 #define S20C2 LCDDATA8_bits.S20C2
1302 #define SEG21COM2 LCDDATA8_bits.SEG21COM2
1303 #define S21C2 LCDDATA8_bits.S21C2
1304 #define SEG22COM2 LCDDATA8_bits.SEG22COM2
1305 #define S22C2 LCDDATA8_bits.S22C2
1306 #define SEG23COM2 LCDDATA8_bits.SEG23COM2
1307 #define S23C2 LCDDATA8_bits.S23C2
1309 // ----- LCDDATA9 bits --------------------
1312 unsigned char SEG0COM3:1;
1313 unsigned char SEG1COM3:1;
1314 unsigned char SEG2COM3:1;
1315 unsigned char SEG3COM3:1;
1316 unsigned char SEG4COM3:1;
1317 unsigned char SEG5COM3:1;
1318 unsigned char SEG6COM3:1;
1319 unsigned char SEG7COM3:1;
1322 unsigned char S0C3:1;
1323 unsigned char S1C3:1;
1324 unsigned char S2C3:1;
1325 unsigned char S3C3:1;
1326 unsigned char S4C3:1;
1327 unsigned char S5C3:1;
1328 unsigned char S6C3:1;
1329 unsigned char S7C3:1;
1331 } __LCDDATA9_bits_t;
1332 extern volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits;
1334 #define SEG0COM3 LCDDATA9_bits.SEG0COM3
1335 #define S0C3 LCDDATA9_bits.S0C3
1336 #define SEG1COM3 LCDDATA9_bits.SEG1COM3
1337 #define S1C3 LCDDATA9_bits.S1C3
1338 #define SEG2COM3 LCDDATA9_bits.SEG2COM3
1339 #define S2C3 LCDDATA9_bits.S2C3
1340 #define SEG3COM3 LCDDATA9_bits.SEG3COM3
1341 #define S3C3 LCDDATA9_bits.S3C3
1342 #define SEG4COM3 LCDDATA9_bits.SEG4COM3
1343 #define S4C3 LCDDATA9_bits.S4C3
1344 #define SEG5COM3 LCDDATA9_bits.SEG5COM3
1345 #define S5C3 LCDDATA9_bits.S5C3
1346 #define SEG6COM3 LCDDATA9_bits.SEG6COM3
1347 #define S6C3 LCDDATA9_bits.S6C3
1348 #define SEG7COM3 LCDDATA9_bits.SEG7COM3
1349 #define S7C3 LCDDATA9_bits.S7C3
1351 // ----- LCDPS bits --------------------
1354 unsigned char LP0:1;
1355 unsigned char LP1:1;
1356 unsigned char LP2:1;
1357 unsigned char LP3:1;
1359 unsigned char LCDA:1;
1360 unsigned char BIASMD:1;
1361 unsigned char WFT:1;
1364 extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits;
1366 #define LP0 LCDPS_bits.LP0
1367 #define LP1 LCDPS_bits.LP1
1368 #define LP2 LCDPS_bits.LP2
1369 #define LP3 LCDPS_bits.LP3
1370 #define WA LCDPS_bits.WA
1371 #define LCDA LCDPS_bits.LCDA
1372 #define BIASMD LCDPS_bits.BIASMD
1373 #define WFT LCDPS_bits.WFT
1375 // ----- LCDSE0 bits --------------------
1378 unsigned char SE0:1;
1379 unsigned char SE1:1;
1380 unsigned char SE2:1;
1381 unsigned char SE3:1;
1382 unsigned char SE4:1;
1383 unsigned char SE5:1;
1384 unsigned char SE6:1;
1385 unsigned char SE7:1;
1388 unsigned char SEGEN0:1;
1389 unsigned char SEGEN1:1;
1390 unsigned char SEGEN2:1;
1391 unsigned char SEGEN3:1;
1392 unsigned char SEGEN4:1;
1393 unsigned char SEGEN5:1;
1394 unsigned char SEGEN6:1;
1395 unsigned char SEGEN7:1;
1398 extern volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits;
1400 #define SE0 LCDSE0_bits.SE0
1401 #define SEGEN0 LCDSE0_bits.SEGEN0
1402 #define SE1 LCDSE0_bits.SE1
1403 #define SEGEN1 LCDSE0_bits.SEGEN1
1404 #define SE2 LCDSE0_bits.SE2
1405 #define SEGEN2 LCDSE0_bits.SEGEN2
1406 #define SE3 LCDSE0_bits.SE3
1407 #define SEGEN3 LCDSE0_bits.SEGEN3
1408 #define SE4 LCDSE0_bits.SE4
1409 #define SEGEN4 LCDSE0_bits.SEGEN4
1410 #define SE5 LCDSE0_bits.SE5
1411 #define SEGEN5 LCDSE0_bits.SEGEN5
1412 #define SE6 LCDSE0_bits.SE6
1413 #define SEGEN6 LCDSE0_bits.SEGEN6
1414 #define SE7 LCDSE0_bits.SE7
1415 #define SEGEN7 LCDSE0_bits.SEGEN7
1417 // ----- LCDSE1 bits --------------------
1420 unsigned char SE8:1;
1421 unsigned char SE9:1;
1422 unsigned char SE10:1;
1423 unsigned char SE11:1;
1424 unsigned char SE12:1;
1425 unsigned char SE13:1;
1426 unsigned char SE14:1;
1427 unsigned char SE15:1;
1430 unsigned char SEGEN8:1;
1431 unsigned char SEGEN9:1;
1432 unsigned char SEGEN10:1;
1433 unsigned char SEGEN11:1;
1434 unsigned char SEGEN12:1;
1435 unsigned char SEGEN13:1;
1436 unsigned char SEGEN14:1;
1437 unsigned char SEGEN15:1;
1440 extern volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits;
1442 #define SE8 LCDSE1_bits.SE8
1443 #define SEGEN8 LCDSE1_bits.SEGEN8
1444 #define SE9 LCDSE1_bits.SE9
1445 #define SEGEN9 LCDSE1_bits.SEGEN9
1446 #define SE10 LCDSE1_bits.SE10
1447 #define SEGEN10 LCDSE1_bits.SEGEN10
1448 #define SE11 LCDSE1_bits.SE11
1449 #define SEGEN11 LCDSE1_bits.SEGEN11
1450 #define SE12 LCDSE1_bits.SE12
1451 #define SEGEN12 LCDSE1_bits.SEGEN12
1452 #define SE13 LCDSE1_bits.SE13
1453 #define SEGEN13 LCDSE1_bits.SEGEN13
1454 #define SE14 LCDSE1_bits.SE14
1455 #define SEGEN14 LCDSE1_bits.SEGEN14
1456 #define SE15 LCDSE1_bits.SE15
1457 #define SEGEN15 LCDSE1_bits.SEGEN15
1459 // ----- LCDSE2 bits --------------------
1462 unsigned char SE16:1;
1463 unsigned char SE17:1;
1464 unsigned char SE18:1;
1465 unsigned char SE19:1;
1466 unsigned char SE20:1;
1467 unsigned char SE21:1;
1468 unsigned char SE22:1;
1469 unsigned char SE23:1;
1472 unsigned char SEGEN16:1;
1473 unsigned char SEGEN17:1;
1474 unsigned char SEGEN18:1;
1475 unsigned char SEGEN19:1;
1476 unsigned char SEGEN20:1;
1477 unsigned char SEGEN21:1;
1478 unsigned char SEGEN22:1;
1479 unsigned char SEGEN23:1;
1482 extern volatile __LCDSE2_bits_t __at(LCDSE2_ADDR) LCDSE2_bits;
1484 #define SE16 LCDSE2_bits.SE16
1485 #define SEGEN16 LCDSE2_bits.SEGEN16
1486 #define SE17 LCDSE2_bits.SE17
1487 #define SEGEN17 LCDSE2_bits.SEGEN17
1488 #define SE18 LCDSE2_bits.SE18
1489 #define SEGEN18 LCDSE2_bits.SEGEN18
1490 #define SE19 LCDSE2_bits.SE19
1491 #define SEGEN19 LCDSE2_bits.SEGEN19
1492 #define SE20 LCDSE2_bits.SE20
1493 #define SEGEN20 LCDSE2_bits.SEGEN20
1494 #define SE21 LCDSE2_bits.SE21
1495 #define SEGEN21 LCDSE2_bits.SEGEN21
1496 #define SE22 LCDSE2_bits.SE22
1497 #define SEGEN22 LCDSE2_bits.SEGEN22
1498 #define SE23 LCDSE2_bits.SE23
1499 #define SEGEN23 LCDSE2_bits.SEGEN23
1501 // ----- LVDCON bits --------------------
1504 unsigned char LVDL0:1;
1505 unsigned char LVDL1:1;
1506 unsigned char LVDL2:1;
1508 unsigned char LVDEN:1;
1509 unsigned char IRVST:1;
1514 extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits;
1516 #define LVDL0 LVDCON_bits.LVDL0
1517 #define LVDL1 LVDCON_bits.LVDL1
1518 #define LVDL2 LVDCON_bits.LVDL2
1519 #define LVDEN LVDCON_bits.LVDEN
1520 #define IRVST LVDCON_bits.IRVST
1522 // ----- OPTION_REG bits --------------------
1525 unsigned char PS0:1;
1526 unsigned char PS1:1;
1527 unsigned char PS2:1;
1528 unsigned char PSA:1;
1529 unsigned char T0SE:1;
1530 unsigned char T0CS:1;
1531 unsigned char INTEDG:1;
1532 unsigned char NOT_RBPU:1;
1534 } __OPTION_REG_bits_t;
1535 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
1537 #define PS0 OPTION_REG_bits.PS0
1538 #define PS1 OPTION_REG_bits.PS1
1539 #define PS2 OPTION_REG_bits.PS2
1540 #define PSA OPTION_REG_bits.PSA
1541 #define T0SE OPTION_REG_bits.T0SE
1542 #define T0CS OPTION_REG_bits.T0CS
1543 #define INTEDG OPTION_REG_bits.INTEDG
1544 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
1546 // ----- OSCCON bits --------------------
1549 unsigned char SCS:1;
1550 unsigned char LTS:1;
1551 unsigned char HTS:1;
1552 unsigned char OSTS:1;
1553 unsigned char IRCF0:1;
1554 unsigned char IRCF1:1;
1555 unsigned char IRCF2:1;
1559 extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
1561 #define SCS OSCCON_bits.SCS
1562 #define LTS OSCCON_bits.LTS
1563 #define HTS OSCCON_bits.HTS
1564 #define OSTS OSCCON_bits.OSTS
1565 #define IRCF0 OSCCON_bits.IRCF0
1566 #define IRCF1 OSCCON_bits.IRCF1
1567 #define IRCF2 OSCCON_bits.IRCF2
1569 // ----- OSCTUNE bits --------------------
1572 unsigned char TUN0:1;
1573 unsigned char TUN1:1;
1574 unsigned char TUN2:1;
1575 unsigned char TUN3:1;
1576 unsigned char TUN4:1;
1582 extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
1584 #define TUN0 OSCTUNE_bits.TUN0
1585 #define TUN1 OSCTUNE_bits.TUN1
1586 #define TUN2 OSCTUNE_bits.TUN2
1587 #define TUN3 OSCTUNE_bits.TUN3
1588 #define TUN4 OSCTUNE_bits.TUN4
1590 // ----- PCON bits --------------------
1593 unsigned char NOT_BO:1;
1594 unsigned char NOT_POR:1;
1597 unsigned char SBOREN:1;
1603 unsigned char NOT_BOR:1;
1613 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
1615 #define NOT_BO PCON_bits.NOT_BO
1616 #define NOT_BOR PCON_bits.NOT_BOR
1617 #define NOT_POR PCON_bits.NOT_POR
1618 #define SBOREN PCON_bits.SBOREN
1620 // ----- PIE1 bits --------------------
1623 unsigned char TMR1IE:1;
1624 unsigned char TMR2IE:1;
1625 unsigned char CCP1IE:1;
1626 unsigned char SSPIE:1;
1627 unsigned char TXIE:1;
1628 unsigned char RCIE:1;
1629 unsigned char ADIE:1;
1630 unsigned char EEIE:1;
1633 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
1635 #define TMR1IE PIE1_bits.TMR1IE
1636 #define TMR2IE PIE1_bits.TMR2IE
1637 #define CCP1IE PIE1_bits.CCP1IE
1638 #define SSPIE PIE1_bits.SSPIE
1639 #define TXIE PIE1_bits.TXIE
1640 #define RCIE PIE1_bits.RCIE
1641 #define ADIE PIE1_bits.ADIE
1642 #define EEIE PIE1_bits.EEIE
1644 // ----- PIE2 bits --------------------
1647 unsigned char CCP2IE:1;
1649 unsigned char LVDIE:1;
1651 unsigned char LCDIE:1;
1652 unsigned char C1IE:1;
1653 unsigned char C2IE:1;
1654 unsigned char OSFIE:1;
1657 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
1659 #define CCP2IE PIE2_bits.CCP2IE
1660 #define LVDIE PIE2_bits.LVDIE
1661 #define LCDIE PIE2_bits.LCDIE
1662 #define C1IE PIE2_bits.C1IE
1663 #define C2IE PIE2_bits.C2IE
1664 #define OSFIE PIE2_bits.OSFIE
1666 // ----- PIR1 bits --------------------
1669 unsigned char TMR1IF:1;
1670 unsigned char TMR2IF:1;
1671 unsigned char CCP1IF:1;
1672 unsigned char SSPIF:1;
1673 unsigned char TXIF:1;
1674 unsigned char RCIF:1;
1675 unsigned char ADIF:1;
1676 unsigned char EEIF:1;
1679 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
1681 #define TMR1IF PIR1_bits.TMR1IF
1682 #define TMR2IF PIR1_bits.TMR2IF
1683 #define CCP1IF PIR1_bits.CCP1IF
1684 #define SSPIF PIR1_bits.SSPIF
1685 #define TXIF PIR1_bits.TXIF
1686 #define RCIF PIR1_bits.RCIF
1687 #define ADIF PIR1_bits.ADIF
1688 #define EEIF PIR1_bits.EEIF
1690 // ----- PIR2 bits --------------------
1693 unsigned char CCP2IF:1;
1695 unsigned char LVDIF:1;
1697 unsigned char LCDIF:1;
1698 unsigned char C1IF:1;
1699 unsigned char C2IF:1;
1700 unsigned char OSFIF:1;
1703 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
1705 #define CCP2IF PIR2_bits.CCP2IF
1706 #define LVDIF PIR2_bits.LVDIF
1707 #define LCDIF PIR2_bits.LCDIF
1708 #define C1IF PIR2_bits.C1IF
1709 #define C2IF PIR2_bits.C2IF
1710 #define OSFIF PIR2_bits.OSFIF
1712 // ----- PORTA bits --------------------
1715 unsigned char RA0:1;
1716 unsigned char RA1:1;
1717 unsigned char RA2:1;
1718 unsigned char RA3:1;
1719 unsigned char RA4:1;
1720 unsigned char RA5:1;
1725 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
1727 #define RA0 PORTA_bits.RA0
1728 #define RA1 PORTA_bits.RA1
1729 #define RA2 PORTA_bits.RA2
1730 #define RA3 PORTA_bits.RA3
1731 #define RA4 PORTA_bits.RA4
1732 #define RA5 PORTA_bits.RA5
1734 // ----- PORTB bits --------------------
1737 unsigned char RB0:1;
1738 unsigned char RB1:1;
1739 unsigned char RB2:1;
1740 unsigned char RB3:1;
1741 unsigned char RB4:1;
1742 unsigned char RB5:1;
1743 unsigned char RB6:1;
1744 unsigned char RB7:1;
1747 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
1749 #define RB0 PORTB_bits.RB0
1750 #define RB1 PORTB_bits.RB1
1751 #define RB2 PORTB_bits.RB2
1752 #define RB3 PORTB_bits.RB3
1753 #define RB4 PORTB_bits.RB4
1754 #define RB5 PORTB_bits.RB5
1755 #define RB6 PORTB_bits.RB6
1756 #define RB7 PORTB_bits.RB7
1758 // ----- PORTC bits --------------------
1761 unsigned char RC0:1;
1762 unsigned char RC1:1;
1763 unsigned char RC2:1;
1764 unsigned char RC3:1;
1765 unsigned char RC4:1;
1766 unsigned char RC5:1;
1767 unsigned char RC6:1;
1768 unsigned char RC7:1;
1771 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
1773 #define RC0 PORTC_bits.RC0
1774 #define RC1 PORTC_bits.RC1
1775 #define RC2 PORTC_bits.RC2
1776 #define RC3 PORTC_bits.RC3
1777 #define RC4 PORTC_bits.RC4
1778 #define RC5 PORTC_bits.RC5
1779 #define RC6 PORTC_bits.RC6
1780 #define RC7 PORTC_bits.RC7
1782 // ----- PORTD bits --------------------
1785 unsigned char RD0:1;
1786 unsigned char RD1:1;
1787 unsigned char RD2:1;
1788 unsigned char RD3:1;
1789 unsigned char RD4:1;
1790 unsigned char RD5:1;
1791 unsigned char RD6:1;
1792 unsigned char RD7:1;
1795 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
1797 #define RD0 PORTD_bits.RD0
1798 #define RD1 PORTD_bits.RD1
1799 #define RD2 PORTD_bits.RD2
1800 #define RD3 PORTD_bits.RD3
1801 #define RD4 PORTD_bits.RD4
1802 #define RD5 PORTD_bits.RD5
1803 #define RD6 PORTD_bits.RD6
1804 #define RD7 PORTD_bits.RD7
1806 // ----- PORTE bits --------------------
1809 unsigned char RE0:1;
1810 unsigned char RE1:1;
1811 unsigned char RE2:1;
1819 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
1821 #define RE0 PORTE_bits.RE0
1822 #define RE1 PORTE_bits.RE1
1823 #define RE2 PORTE_bits.RE2
1825 // ----- RCSTA bits --------------------
1828 unsigned char RX9D:1;
1829 unsigned char OERR:1;
1830 unsigned char FERR:1;
1831 unsigned char ADDEN:1;
1832 unsigned char CREN:1;
1833 unsigned char SREN:1;
1834 unsigned char RX9:1;
1835 unsigned char SPEN:1;
1838 unsigned char RCD8:1;
1844 unsigned char RC9:1;
1854 unsigned char NOT_RC8:1;
1864 unsigned char RC8_9:1;
1868 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
1870 #define RX9D RCSTA_bits.RX9D
1871 #define RCD8 RCSTA_bits.RCD8
1872 #define OERR RCSTA_bits.OERR
1873 #define FERR RCSTA_bits.FERR
1874 #define ADDEN RCSTA_bits.ADDEN
1875 #define CREN RCSTA_bits.CREN
1876 #define SREN RCSTA_bits.SREN
1877 #define RX9 RCSTA_bits.RX9
1878 #define RC9 RCSTA_bits.RC9
1879 #define NOT_RC8 RCSTA_bits.NOT_RC8
1880 #define RC8_9 RCSTA_bits.RC8_9
1881 #define SPEN RCSTA_bits.SPEN
1883 // ----- SSPCON bits --------------------
1886 unsigned char SSPM0:1;
1887 unsigned char SSPM1:1;
1888 unsigned char SSPM2:1;
1889 unsigned char SSPM3:1;
1890 unsigned char CKP:1;
1891 unsigned char SSPEN:1;
1892 unsigned char SSPOV:1;
1893 unsigned char WCOL:1;
1896 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
1898 #define SSPM0 SSPCON_bits.SSPM0
1899 #define SSPM1 SSPCON_bits.SSPM1
1900 #define SSPM2 SSPCON_bits.SSPM2
1901 #define SSPM3 SSPCON_bits.SSPM3
1902 #define CKP SSPCON_bits.CKP
1903 #define SSPEN SSPCON_bits.SSPEN
1904 #define SSPOV SSPCON_bits.SSPOV
1905 #define WCOL SSPCON_bits.WCOL
1907 // ----- SSPSTAT bits --------------------
1916 unsigned char CKE:1;
1917 unsigned char SMP:1;
1922 unsigned char I2C_READ:1;
1923 unsigned char I2C_START:1;
1924 unsigned char I2C_STOP:1;
1925 unsigned char I2C_DATA:1;
1932 unsigned char NOT_W:1;
1935 unsigned char NOT_A:1;
1942 unsigned char NOT_WRITE:1;
1945 unsigned char NOT_ADDRESS:1;
1952 unsigned char R_W:1;
1955 unsigned char D_A:1;
1962 unsigned char READ_WRITE:1;
1965 unsigned char DATA_ADDRESS:1;
1970 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
1972 #define BF SSPSTAT_bits.BF
1973 #define UA SSPSTAT_bits.UA
1974 #define R SSPSTAT_bits.R
1975 #define I2C_READ SSPSTAT_bits.I2C_READ
1976 #define NOT_W SSPSTAT_bits.NOT_W
1977 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
1978 #define R_W SSPSTAT_bits.R_W
1979 #define READ_WRITE SSPSTAT_bits.READ_WRITE
1980 #define S SSPSTAT_bits.S
1981 #define I2C_START SSPSTAT_bits.I2C_START
1982 #define P SSPSTAT_bits.P
1983 #define I2C_STOP SSPSTAT_bits.I2C_STOP
1984 #define D SSPSTAT_bits.D
1985 #define I2C_DATA SSPSTAT_bits.I2C_DATA
1986 #define NOT_A SSPSTAT_bits.NOT_A
1987 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
1988 #define D_A SSPSTAT_bits.D_A
1989 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
1990 #define CKE SSPSTAT_bits.CKE
1991 #define SMP SSPSTAT_bits.SMP
1993 // ----- STATUS bits --------------------
1999 unsigned char NOT_PD:1;
2000 unsigned char NOT_TO:1;
2001 unsigned char RP0:1;
2002 unsigned char RP1:1;
2003 unsigned char IRP:1;
2006 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
2008 #define C STATUS_bits.C
2009 #define DC STATUS_bits.DC
2010 #define Z STATUS_bits.Z
2011 #define NOT_PD STATUS_bits.NOT_PD
2012 #define NOT_TO STATUS_bits.NOT_TO
2013 #define RP0 STATUS_bits.RP0
2014 #define RP1 STATUS_bits.RP1
2015 #define IRP STATUS_bits.IRP
2017 // ----- T1CON bits --------------------
2020 unsigned char TMR1ON:1;
2021 unsigned char TMR1CS:1;
2022 unsigned char NOT_T1SYNC:1;
2023 unsigned char T1OSCEN:1;
2024 unsigned char T1CKPS0:1;
2025 unsigned char T1CKPS1:1;
2026 unsigned char T1GE:1;
2027 unsigned char T1GINV:1;
2032 unsigned char T1INSYNC:1;
2042 unsigned char T1SYNC:1;
2050 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
2052 #define TMR1ON T1CON_bits.TMR1ON
2053 #define TMR1CS T1CON_bits.TMR1CS
2054 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
2055 #define T1INSYNC T1CON_bits.T1INSYNC
2056 #define T1SYNC T1CON_bits.T1SYNC
2057 #define T1OSCEN T1CON_bits.T1OSCEN
2058 #define T1CKPS0 T1CON_bits.T1CKPS0
2059 #define T1CKPS1 T1CON_bits.T1CKPS1
2060 #define T1GE T1CON_bits.T1GE
2061 #define T1GINV T1CON_bits.T1GINV
2063 // ----- T2CON bits --------------------
2066 unsigned char T2CKPS0:1;
2067 unsigned char T2CKPS1:1;
2068 unsigned char TMR2ON:1;
2069 unsigned char TOUTPS0:1;
2070 unsigned char TOUTPS1:1;
2071 unsigned char TOUTPS2:1;
2072 unsigned char TOUTPS3:1;
2076 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
2078 #define T2CKPS0 T2CON_bits.T2CKPS0
2079 #define T2CKPS1 T2CON_bits.T2CKPS1
2080 #define TMR2ON T2CON_bits.TMR2ON
2081 #define TOUTPS0 T2CON_bits.TOUTPS0
2082 #define TOUTPS1 T2CON_bits.TOUTPS1
2083 #define TOUTPS2 T2CON_bits.TOUTPS2
2084 #define TOUTPS3 T2CON_bits.TOUTPS3
2086 // ----- TRISA bits --------------------
2089 unsigned char TRISA0:1;
2090 unsigned char TRISA1:1;
2091 unsigned char TRISA2:1;
2092 unsigned char TRISA3:1;
2093 unsigned char TRISA4:1;
2094 unsigned char TRISA5:1;
2099 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
2101 #define TRISA0 TRISA_bits.TRISA0
2102 #define TRISA1 TRISA_bits.TRISA1
2103 #define TRISA2 TRISA_bits.TRISA2
2104 #define TRISA3 TRISA_bits.TRISA3
2105 #define TRISA4 TRISA_bits.TRISA4
2106 #define TRISA5 TRISA_bits.TRISA5
2108 // ----- TRISB bits --------------------
2111 unsigned char TRISB0:1;
2112 unsigned char TRISB1:1;
2113 unsigned char TRISB2:1;
2114 unsigned char TRISB3:1;
2115 unsigned char TRISB4:1;
2116 unsigned char TRISB5:1;
2117 unsigned char TRISB6:1;
2118 unsigned char TRISB7:1;
2121 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
2123 #define TRISB0 TRISB_bits.TRISB0
2124 #define TRISB1 TRISB_bits.TRISB1
2125 #define TRISB2 TRISB_bits.TRISB2
2126 #define TRISB3 TRISB_bits.TRISB3
2127 #define TRISB4 TRISB_bits.TRISB4
2128 #define TRISB5 TRISB_bits.TRISB5
2129 #define TRISB6 TRISB_bits.TRISB6
2130 #define TRISB7 TRISB_bits.TRISB7
2132 // ----- TRISC bits --------------------
2135 unsigned char TRISC0:1;
2136 unsigned char TRISC1:1;
2137 unsigned char TRISC2:1;
2138 unsigned char TRISC3:1;
2139 unsigned char TRISC4:1;
2140 unsigned char TRISC5:1;
2141 unsigned char TRISC6:1;
2142 unsigned char TRISC7:1;
2145 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
2147 #define TRISC0 TRISC_bits.TRISC0
2148 #define TRISC1 TRISC_bits.TRISC1
2149 #define TRISC2 TRISC_bits.TRISC2
2150 #define TRISC3 TRISC_bits.TRISC3
2151 #define TRISC4 TRISC_bits.TRISC4
2152 #define TRISC5 TRISC_bits.TRISC5
2153 #define TRISC6 TRISC_bits.TRISC6
2154 #define TRISC7 TRISC_bits.TRISC7
2156 // ----- TRISD bits --------------------
2159 unsigned char TRISD0:1;
2160 unsigned char TRISD1:1;
2161 unsigned char TRISD2:1;
2162 unsigned char TRISD3:1;
2163 unsigned char TRISD4:1;
2164 unsigned char TRISD5:1;
2165 unsigned char TRISD6:1;
2166 unsigned char TRISD7:1;
2169 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
2171 #define TRISD0 TRISD_bits.TRISD0
2172 #define TRISD1 TRISD_bits.TRISD1
2173 #define TRISD2 TRISD_bits.TRISD2
2174 #define TRISD3 TRISD_bits.TRISD3
2175 #define TRISD4 TRISD_bits.TRISD4
2176 #define TRISD5 TRISD_bits.TRISD5
2177 #define TRISD6 TRISD_bits.TRISD6
2178 #define TRISD7 TRISD_bits.TRISD7
2180 // ----- TRISE bits --------------------
2183 unsigned char TRISE0:1;
2184 unsigned char TRISE1:1;
2185 unsigned char TRISE2:1;
2193 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
2195 #define TRISE0 TRISE_bits.TRISE0
2196 #define TRISE1 TRISE_bits.TRISE1
2197 #define TRISE2 TRISE_bits.TRISE2
2199 // ----- TXSTA bits --------------------
2202 unsigned char TX9D:1;
2203 unsigned char TRMT:1;
2204 unsigned char BRGH:1;
2206 unsigned char SYNC:1;
2207 unsigned char TXEN:1;
2208 unsigned char TX9:1;
2209 unsigned char CSRC:1;
2212 unsigned char TXD8:1;
2218 unsigned char NOT_TX8:1;
2228 unsigned char TX8_9:1;
2232 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
2234 #define TX9D TXSTA_bits.TX9D
2235 #define TXD8 TXSTA_bits.TXD8
2236 #define TRMT TXSTA_bits.TRMT
2237 #define BRGH TXSTA_bits.BRGH
2238 #define SYNC TXSTA_bits.SYNC
2239 #define TXEN TXSTA_bits.TXEN
2240 #define TX9 TXSTA_bits.TX9
2241 #define NOT_TX8 TXSTA_bits.NOT_TX8
2242 #define TX8_9 TXSTA_bits.TX8_9
2243 #define CSRC TXSTA_bits.CSRC
2245 // ----- VRCON bits --------------------
2248 unsigned char VR0:1;
2249 unsigned char VR1:1;
2250 unsigned char VR2:1;
2251 unsigned char VR3:1;
2253 unsigned char VRR:1;
2255 unsigned char VREN:1;
2258 extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
2260 #define VR0 VRCON_bits.VR0
2261 #define VR1 VRCON_bits.VR1
2262 #define VR2 VRCON_bits.VR2
2263 #define VR3 VRCON_bits.VR3
2264 #define VRR VRCON_bits.VRR
2265 #define VREN VRCON_bits.VREN
2267 // ----- WDTCON bits --------------------
2270 unsigned char SWDTEN:1;
2271 unsigned char WDTPS0:1;
2272 unsigned char WDTPS1:1;
2273 unsigned char WDTPS2:1;
2274 unsigned char WDTPS3:1;
2280 unsigned char SWDTE:1;
2290 extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
2292 #define SWDTEN WDTCON_bits.SWDTEN
2293 #define SWDTE WDTCON_bits.SWDTE
2294 #define WDTPS0 WDTCON_bits.WDTPS0
2295 #define WDTPS1 WDTCON_bits.WDTPS1
2296 #define WDTPS2 WDTCON_bits.WDTPS2
2297 #define WDTPS3 WDTCON_bits.WDTPS3
2299 // ----- WPU bits --------------------
2302 unsigned char WPU0:1;
2303 unsigned char WPU1:1;
2304 unsigned char WPU2:1;
2305 unsigned char WPU3:1;
2306 unsigned char WPU4:1;
2307 unsigned char WPU5:1;
2308 unsigned char WPU6:1;
2309 unsigned char WPU7:1;
2312 extern volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits;
2314 #define WPU0 WPU_bits.WPU0
2315 #define WPU1 WPU_bits.WPU1
2316 #define WPU2 WPU_bits.WPU2
2317 #define WPU3 WPU_bits.WPU3
2318 #define WPU4 WPU_bits.WPU4
2319 #define WPU5 WPU_bits.WPU5
2320 #define WPU6 WPU_bits.WPU6
2321 #define WPU7 WPU_bits.WPU7
2323 // ----- WPUB bits --------------------
2326 unsigned char WPUB0:1;
2327 unsigned char WPUB1:1;
2328 unsigned char WPUB2:1;
2329 unsigned char WPUB3:1;
2330 unsigned char WPUB4:1;
2331 unsigned char WPUB5:1;
2332 unsigned char WPUB6:1;
2333 unsigned char WPUB7:1;
2336 extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;
2338 #define WPUB0 WPUB_bits.WPUB0
2339 #define WPUB1 WPUB_bits.WPUB1
2340 #define WPUB2 WPUB_bits.WPUB2
2341 #define WPUB3 WPUB_bits.WPUB3
2342 #define WPUB4 WPUB_bits.WPUB4
2343 #define WPUB5 WPUB_bits.WPUB5
2344 #define WPUB6 WPUB_bits.WPUB6
2345 #define WPUB7 WPUB_bits.WPUB7